BS QC 790105-1992 Specification for harmonized system of quality assessment for electronic components - Semiconductor devices - Integrated circuits - Blank detail specification - Il.pdf

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1、BRITISH STANDARD BS QC 790105: 1993 IEC 748-2-7: 1992 Specification for Harmonized system of quality assessment for electronic components Semiconductor devices Integrated circuits Blank detail specification Integrated circuit fusible-link programmable bipolar read-only memoriesBSQC790105:1993 BSI 10

2、-1999 ISBN 0 580 35596 9 Amendments issued since publication Amd. No. Date CommentsBSQC790105:1993 BSI 10-1999 i Contents Page National foreword ii Introduction 1 1 Marking and ordering information 3 2 Application related description 3 3 Specification of the function 3 4 Limiting values (absolute ma

3、ximum rating system) 4 5 Operating conditions (within the specified operating temperature range) 5 6 Electrical characteristics 5 7 Programming 6 8 Mechanical and environmental ratings, characteristics and data 7 9 Additional Information 7 10 Screening procedure (if required) 8 11 Quality assessment

4、 procedures 8 12 Structural similarity procedures 8 13 Test conditions and inspection requirements 8 14 Additional measurement method 13 Table I Group A 10 Table II Group B 11 Table III Group C 12 Table IV Group D 13BSQC790105:1993 ii BSI 10-1999 National foreword This British Standard has been prep

5、ared under the direction of the Electronic Components Standards Policy Committee, ECL/-. It is identical with IECPublication748-2-7 (QC790105) “Semiconductor devices. Integrated circuits. Part2: Digital integrated circuits. Section 7: Blank detail specification for integrated circuit fusible-link pr

6、ogrammable bipolar read-only memories” published by the International Electrotechnical Commission (IEC) and is a harmonized specification within the IECQ system of quality assessment for electronic components. This blank detail specification is one of a series of blank detail specifications for semi

7、conductor devices to be used with BSQC700000:1991 “Harmonized system of quality assessment for electronic components. Generic specification for discrete devices and integrated circuits” and BSQC790100:1991 Harmonized system of quality assessment for electronic components. Semiconductor devices. Sect

8、ional specification for semiconductor integrated circuits excluding hybrid circuits. The Technical Committee has reviewed the provisions of IEC134 to which reference is made in the text, and has decided that they are acceptable for use in conjunction with this standard. A British Standard does not p

9、urport to include all the necessary provisions of a contract. Users of British Standards are responsible for their correct application. Compliance with a British Standard does not of itself confer immunity from legal obligations. Cross-references International Standard a Corresponding British Standa

10、rd IEC 68-2-17 BS 2011 Environmental testing Part 2.1 Q:1981 Test Q. Sealing (Identical) IEC 617-12 BS 3939 Graphical symbols for electrical power, telecommunications and electronics diagrams Part12:1985 Guide for binary logic elements (Identical) IEC 747-10 BS QC 700000:1991 Harmonized system of qu

11、ality assessment for electronic components. Generic specification for discrete devices and integrated circuits (Identical) IEC 748-11 BS QC 790100:1991 Harmonized system of quality assessment for electronic components. Semiconductor devices. Sectional specification for semiconductor integrated circu

12、its excluding hybrid circuits (Identical) IEC 749 BS 6493 Semiconductor devices Part 3:1985 Mechanical and climatic test methods (Identical) QC 001002 BS QC 001002:1991 Rules of Procedure of the IEC Quality Assessment System for Electronic Components (IECQ) (Identical) a Undated in the text. Summary

13、 of pages This document comprises a front cover, an inside front cover, pagesi andii, pages1 to14 and a back cover. This standard has been updated (see copyright date) and may have had amendments incorporated. This will be indicated in the amendment table on the inside front cover.BSQC790105:1993 BS

14、I 10-1999 1 Introduction The IEC Quality Assessment System for Electronic Components is operated in accordance with the statutes of the IEC and under the authority of the IEC. The object of this system is to define quality assessment procedures in such a manner that electronic components released by

15、 one participating country as conforming with the requirements of an applicable specification are equally acceptable in all other participating countries without the need for further testing. This blank detail specification is one of a series of blank detail specifications for semiconductor devices

16、and shall be used with the following IEC Publications: 747-10/QC 700000: Semiconductor devices. Part 10: Generic specification for discrete devices and integrated circuits. 748-11/QC 790100: Semiconductor devices. Integrated circuits. Part 11: Sectional specification for semiconductor integrated cir

17、cuits excluding hybrid circuits. Required information Numbers shown in brackets on this and the following pages correspond to the following items of required information, which should be entered in the spaces provided. Identification of the detail specification 1 The name of the National Standards O

18、rganization under whose authority the detail specification is issued. 2 The IECQ number of the detail specification. 3 The numbers and issue numbers of the generic and sectional specifications. 4 The national number of the detail specification, date of issue and any further information, if required

19、by the national system. Identification of the component 5 Main function and type number. 6 Information on typical construction (materials, the main technology) and the package. If applicable, variants of the products shall be given here together with the variant characteristics. The detail specifica

20、tion shall give a brief description including the following: structure (words bits); type of output circuit (for example: three state); major functions. 7 Outline drawing, terminal identification, marking and/or reference to the relevant document for outlines. 8 Category of assessed quality accordin

21、g to subclause 2.6 of the generic specification. 9 Reference data. The clauses given in square brackets on the next pages of this standard, which form the front page of the detail specification, are intended for guidance to the specification writer and shall not be included in the detail specificati

22、on. When confusion may arise as to whether a paragraph is only instruction to the writer or not, the paragraph shall be indicated between brackets.BSQC790105:1993 2 BSI 10-1999 Name (address) of responsible NAI (and possibly of body from which specification is available). 1 Number of IECQ detail spe

23、cification, plus issue number and/or date. QC 790105-. 2 ELECTRONIC COMPONENT OF ASSESSED QUALITY IN ACCORDANCE WITH: 3 National number of detail specification. This box need not be used if national number repeats IECQ number. 4 Generic specification: Publication 747-10/QC 700000 Sectional specifica

24、tion: Publication 748-11/QC 790100 and national references if different. BLANK DETAIL SPECIFICATION FOR: INTEGRATED CIRCUIT FUSIBLE-LINK PROGRAMMABLE BIPOLAR READ-ONLY MEMORIES 5 Type number(s) of the relevant device(s). Ordering information: see subclause 1.2 of this standard. Mechanical descriptio

25、n 7 Short description 6 Outline references: Standard package references should be given, IEC number (mandatory if available) and/or national number. Outline drawing may be transferred to or given with more details in clause8 of this standard. Application: Function: Typical construction: Si, monolith

26、ic, bipolar, MOS. Fuse technology: Encapsulation: cavity or non-cavity. Comparison table of characteristics for variant products. CAUTION: Electrostatic sensitive devices Terminal identification drawing showing pin assignments, including graphical symbols. Categories of assessed quality From subclau

27、se 2.6 of the generic specification. 8 Marking: letters and figures, or colour code. The detail specification shall prescribe the information to be marked on the device, if any. See subclause2.5 of generic specification and/or subclause1.1 of this standard. Reference data Reference data on the most

28、important properties to permit comparison between types. 9 Information about manufacturers who have components qualified to this detail specification is available in the current Qualified Products List.BSQC790105:1993 BSI 10-1999 3 1 Marking and ordering information 1.1 Marking See subclause2.5 of t

29、he generic specification. 1.2 Ordering information The following minimum information is necessary to order a specific device, unless otherwise specified: precise type reference (and nominal voltage value, if required); IECQ reference of detail specification with issue number and/or date when relevan

30、t; category of assessed quality as defined in clause9 of the sectional specification and, if required, the screening sequence as defined in clause8 of the sectional specification; packaging for delivery; any other particulars. 2 Application related description The following characteristics shall be

31、given: nominal supply voltage; nominal current consumption; standby current consumption (if applicable); fuse technology; operating modes; electrical compatibility (if appropriate); It shall be stated whether the integrated circuit memory is electrically compatible with other particular integrated c

32、ircuits or families of integrated circuits, or whether special interfaces are required. overall block diagram; summary of the programming conditions (see also clause7 of this standard). 3 Specification of the function 3.1 Block diagram The block diagram shall be sufficiently detailed to enable the i

33、ndividual functional units within the memory to be identified with their main input and output paths and the identification of their external connections (chip enable, address decode, programming, etc.). The graphical symbol for the function shall be given. This may be obtained from a catalogue of s

34、tandards of graphical symbols, or designed according to the rules of IEC617-12. 3.2 Identification and function of terminals All terminals shall be identified on the block diagram (supply terminals, address, data and control terminals). The terminal functions shall be indicated in a table as follows

35、. Terminal number a Terminal symbol Terminal designation Function Function of terminal Input/output identification Type of output circuit a The chip select and the output enable shall be distinguished.BSQC790105:1993 4 BSI 10-1999 3.3 Functional description The following characteristics shall be giv

36、en: memory size: the total number of bits of information capable of being stored in the memory circuit; memory organization: the number of bits per word capable of being stored in the memory circuit; addressing mode (for example: multiplexed, latched, etc.); chip select 1)(if applicable); output ena

37、ble 1)(if applicable); standby mode (if applicable); truth table (this table shall show the output states versus the different combinations of the address inputs and the select inputs). The product is designed to be electrically programmed (see subclause3.3.1 below). The initial logic state of the w

38、hole memory shall be specified. 3.3.1 Programming (writing of a content) Programming methods and conditions shall be given in the detail specification (seealsoclause7). 3.3.2 Functional interchangeable types All products described in the detail specification are interchangeable after programming. In

39、 this case, products may be programmed under different methods. Each of these methods is described in clause7 of this standard. 4 Limiting values (absolute maximum rating system) See IEC Publication134. These values apply over the operating temperature range, unless otherwise specified. Unless other

40、wise specified, limiting values shall be given as follows: any cautionary statement unique to an individual integrated circuit shall be included; any interdependence of limiting values shall be specified; all conditions for which the limiting values apply shall be stated; if transient overloads are

41、permitted, their magnitude and duration shall be specified; where minimum and maximum values differ during programming of the device, this shall be stated. All voltages are referenced to a designated reference terminal. 1) The chip select and the output enable shall be distinguished. Parameters (not

42、e 2) Symbols Min. Max. Unit Supply voltage V CC V Input voltages V i V Output voltages V O V Off-state voltage (note 1) V OZ V Output currents I O mA Input currents I I mA Power dissipation P D W Operating temperature T amband/or T case C Storage temperature T stg C NOTE 1Where appropriate. NOTE 2An

43、y conditions such as time, frequency, temperature, mounting method, etc. shall be stated.BSQC790105:1993 BSI 10-1999 5 5 Operating conditions (within the specified operating temperature range) These conditions are not to be inspected but may be used for quality assessment purposes. 6 Electrical char

44、acteristics The characteristics shall apply over the full operating temperature range, unless otherwise specified. Where the stated performance of the circuit varies over the operating temperature range, the values of the input and output voltages, and their associated currents shall be stated at25

45、C and at the extremes of the operating temperature range. Values of current and voltage shall be given for each functionally different type of input and/or output. Special characteristics and timing requirements shall be specified. 6.1 Static characteristics All voltages are referenced to a designat

46、ed reference terminal. Characteristics Symbols Min. Max. Unit Supply voltage V CC (note 1) V Low-level input voltage V IL V High-level input voltage V IH V Operating temperature T amband/or T case C NOTE 1Where appropriate, these values shall also be quoted under standby conditions. Characteristics

47、Conditions (note 4) Symbols Min. a Max. a Unit Supply current (note 1) V CCmax. I CC mA High-level output voltage (note 5) V CC min. I OHA V OH V Low-level output voltage (note 5) V CCmin. I OLA V OL V High-level input or leakage voltagecurrent V CCmax. V IHB I IH(1) 4A High-level input or leakage c

48、urrent (where appropriate) V CC max. V IHA I IH(2) 4A Low-level input or leakage current V CCmax. V ILA I IL(1) 4A Low-level input or leakage current (where appropriate) V CCmax. V ILB I IL(2) 4A High-level output current (note 5) V CCmin. V OHB I OH 4A Low-level output current (note 5) V CCmax. V O

49、LA I OL 4A High-level output current (leakage) (note 2) V CCmax. V OHA I OHX 4A Low-level output current (leakage) (note 2) V CCmax. V OLB I OLX 4A High-level output leakage current at three-state outputs (if applicable) V CC max. V OHB I OHZ 4A Low-level output leakage current at three-state outputs (if appli