ANSI INCITS ISO 8860-2-1987 Information processing - Data interchange on 90 mm (3.5 in) flexible disk cartridges using modified frequency modulation recording at 7 958 ftprad on 80.pdf

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1、INTERNATIONAL STANDARD INTERNATIONAL ORGANIZATION FOR STANDARDIZATION ORGANISATION INTERNATIONALE DE NORMALISATION ME)ILIYHAPOHAR OPAHH3AHR I-IO CTAHAAPTMJAMM Information processing - Data interchange on 90 mm (3.5 in) flexible disk cartridges using modified frequency modulation recording at 7 958 f

2、tprad on 80 tracks on each side - Part 2 : Track format Traitement de /information - ichange de donnkes sur cartouches A disquette de 90 mm (3,5 in) utilisant un enregistrement b) a flux transition shall be written at each cell boundary between consecutive bit cells containing ZEROS. Exceptions to t

3、his are defined in 4.12. 4.2 Track location tolerance of the recorded flexible disk cartridge The centrelines of the recorded tracks shall be within + 0,029 mm ( + 0.001 1 in) of the nominal positions and over the range of operating environment specified in IS0 9950-I. 4.3 Recording offset angle (se

4、e figure 1) At the instant of writing or reading a magnetic transition, the transition shall have an angle of + 18 where R, is the radius through that transition (see IS0 9960-1). 1 IS0 8860-2 : 1987 (El -I- d d =0,35mm(O.O14in) Figure 1 NOTE - As tracks may be written and overwritten at extremes of

5、 the tolerances given in 4.2 and 4.3, a band of old information may be left at one edge of the newly written data and would constitute unwanted noise when reading. It is, therefore, necessary to trim the edges of the tracks by erasure after writing. 4.4 Density of recording 4.4.1 The nominal density

6、 of recording shall be 7 959 ftprad. The resulting nominal bit cell length is 125,7 urad. 4.4.2 The long-term average bit cell length shall be the average bit cell length measured over a sector. It shall be within Z!I 2,0 % ot the nominal bit cell length. 4.4.3 The short term average bit cell length

7、, referred to a par- ticular bit cell, shall be the average of the lengths of the preceding eight bit cells. It shall be within k 8 % of the long- term average bit cell length. 4.5 Flux transition spacing (see figure 2) The instantaneous spacing between flux transitions is in- fluenced by the readin

8、g and writing process, the bit sequence (pulse crowding effects) and other factors. The locations of the transitions are defined as the locations of the peaks in the signal when reading. Tests should be carried out using a peak-sensing amplifier (see annexes B and Cl. 4.5.1 The spacing between the f

9、lux transitions in a sequence of ONES shall be between 80 % and 120 % of the short-term average bit cell length. 4.5.2 The spacing between the flux transition for a ONE and that between two ZEROS preceding or following it shall be between 136 % and 165 % ot the short-term average bit cell length. 4.

10、5.3 The spacing between the flux transitions of two ONES surrounding a ZERO shall lie between 185 % and 225 % of the short-term average bit cell length. 8oJo to120h 130% to 165% 130%to 165% 185% to 225% Figure 2 2 IS0 8850-2 : 1987 (El 4.6 Average Signal Amplitude For each side the Average Signal Am

11、plitude on any track of the interchanged flexible disk cartridge shall be less than 160 % of SRAlfand more than 40 % of SRAV(see IS0 8860-l). (FE) for (B8to Bl) = 11111110 (FB) for (B8 to Bl) = 11111011 (Al)* for (88 to Bl) = 10100001 In byte (Al)* the boundary transition between 83 and 84 is missin

12、g. 4.7 Byte A byte is a group of eight bit-positions, identified Bl to 88. The bit in each position is a ZERO or a ONE. 4.13 Error Detection Characters (EDCI 4.8 Sector The two EDC bytes are hardware-generated by shifting serially the relevant bits, specified later for each part of the track, throug

13、h a 16-bit shift register described by the generator polynomial : All tracks shall be divided into 9 sectors of 512 bytes. x6 + xl* + x5 + 1 4.9 Cylinder (See also annex A.) A pair of tracks, one on each side, having the same track number. 5 Track layout 4.10 Cylinder number The cylinder number shal

14、l be a two-digit number identical with the track number of the tracks of the cylinder. After formatting, there shall be 9 sectors on each track. The layout of each track shall be as shown in figure 3. 5.1 Index Gap 4.11 Data capacity of a track The data capacity of a track shall be 4 608 bytes. At n

15、ominal density, this field shall comprise not less than 32 bytes and not more than 146 bytes of unspecified content but not containing any (Al )*-bytes. 4.12 Hexadecimal notation Hexadecimal notation shall be used hereafter to denote the following bytes : Writing the Index Gap is started when the in

16、dex is detected. The index in any track lies on a line that is parallel to radius B in figure 4 of IS0 8860-l and spaced 0,35 mm (0.014 in) from it. Any of the first 16 bytes may be ill-defined due to overwriting. (00) for (88 to Bl) = 00000000 (01) for (B8to Bl) = 00000001 (02) for (88 to Bl) = OOO

17、OOOlO (4E) for (88 to Bl) = 01001110 5.2 Sector Identifier The layout of this field shall be as given in table 1. Figure 3 Table 1 Sector identifier 12 bytes (00) Identifier mark 3 bytes (Al)” 1 byte (FE) Address identifier Track address S EDC C Side 1 byte 1 byte 1 byte 1 byte (021 2 bytes (00) or

18、(01) 3 IS0 8860-2 : 1967 (El 5.2.1 identifier Mark Table 2 This field shall comprise 16 bytes : 12 (OOLbytes 3 (Al )*-bytes 1 (FE)-byte 5.2.2 Address Identifier This field shall comprise 6 bytes. 5.2.2.1 Track Address This field shall comprise 2 bytes : a) Cylinder Number (Cl This field shall specif

19、y in binary notation the cylinder number from 00 for the outermost cylinder to 79 for the innermost cylinder. b) Side Number (side) This field shall specify the side of the disk. On side 0, it shall be (00) on all tracks. On Side 1 it shall be (01) on all tracks. 5.2.2.2 Sector Number (S) The 3rd by

20、te shall specify in binary notation the sector number from 01 for the first sector to 09 for the last sector. The sectors may be recorded in any order of their sector numbers. 5.2.2.3 4th byte The 4th byte shall always be a (02Lbyte. 5.2.2.4 EDC These two bytes shall be generated as defined in 4.13

21、using the bytes of the Sector Identifier starting with the first (Al)*-byte (see 5.2.1) of the Identifier Mark and ending with the 4th byte (see 5.2.2.3) of the Address Identifier. If the EDC is incorrect, then the sector is defective. IS0 9293 specifies the handling of defective sectors. 5.3 Identi

22、fier Gap This field shall comprise initially 22 (4E)-bytes. These bytes may have become ill-defined due to overwriting. 5.4 Data Block The layout of this field shall be as given in table 2. Data block Data mark Data field EDC 12 bytes 3bytes 1 byte Nlo) (Al) (FBI 512 bytes 2bytes 5.4.1 Data Mark Thi

23、s field shall comprise 16 bytes: 12 (OOI-bytes 3 (Al )*-bytes 1 (FBI-byte 5.4.2 Data Field This field shall comprise 512 bytes. If it comprises less than the requisite number of data bytes, the remaining positions shall be filled with (OO)-bytes. 5.4.3 EDC These two bytes shall be generated as defin

24、ed in 4.13 using the bytes of the Data Block starting with the first (Al )*-byte of the Data Mark and ending with the last byte of the Data Field. If the EDC is incorrect, then the sector is defective. IS0 9293 specifies the handling of defective sectors. 5.5 Data Block Gap This field shall comprise

25、 initially not less than 78 bytes and not more than 84 (4E)-bytes. These bytes may have become ill- defined due to overwriting. The Data Block Gap is recorded after each Data Block and it precedes the following Sector Identifier. After the last Data Block, it precedes the Track Gap. 5.6 Track Gap Th

26、is field shall follow the Data Block Gap of the last sector. (4El-bytes are written until the index is detected, unless it has been detected during writing of the last Data Block Gap, in which case there shall be no Track Gap. 6 Coded representation of data 6.1 Standards The contents of the data fie

27、ld shall be recorded and interpreted according to the relevant International Standards for the coding of information, for example IS0 646, IS0 2022 or IS0 4873. 6.2 Coding methods 6.2.1 When the coding method requires it, the data field shall be regarded as an ordered sequence of 8-bit bytes. Within

28、 each byte the bit positions shall be identified by 88 to Bl. The high-order bit shall be recorded in position B8 and the low-order bit in position Bl. The sequence of recording shall be high-order bit first. 4 IS0 8860-2 : 1987 (E) When the data is encoded according to an 8-bit code, the binary wei

29、ghts of the bit positions shall be as shown in figure 4. Binary position 88 87 B6 85 84 B3 82 Bl Binary weights 128 64 32 16 8 4 2 1 Figure 4 When the data is encoded according to a 7-bit code, bit posi- tion 88 shall contain bit ZERO, and the data shall be encoded in bit positions 87 to Bl, using t

30、he same binary weights as shown in figure 4. 6.2.2 When the coding method requires it, the data field shall be regarded as an ordered sequence of bit positions, each con- taining a bit. ISO9960-2 :1997(E) Annex A EDC implementation (This annex does not form part of the standard.) Figure 5 shows the

31、feedback connections of a shift register which may be used to generate the EDC bytes. Prior to the operation, all positions of the shift register are set to ONE. Input data are added (exclusive OR) to the contents of position C,s of the register to form a feedback. This feedback is in its turn added

32、 (exclusive OR) to the contents of position C4 and position C,. On shifting, the outputs of the exclusive OR gates are entered respectively into positions Cc, Cs and C12. After the last data bit has been added, the register is shifted once more as specified above. The register then contains the EDC

33、bytes. If further shifting is to take place during the writing of the EDC bytes, the control signal inhibits exclusive OR operations. To check for errors when reading, the data bits are added into the shift register in exactly the same manner as they were during writing. After the data, the EDC byte

34、s are also entered into the shift register as if they were data. After the final shift, the register contents will be all ZERO if the record does not contain errors. Control LpJ+ with present technology only an analogue data separator based on a phase-locked oscillator can provide the necessary reli

35、ability. IS0 8860-2 : 1987 (E) Bibliography IS0 6429, Information processing - IS0 7-bit and B-bit coded character sets - Additional control functions for character-imaging devices. IS0 8859, Information processing - IS0 B-bit single byte coded graphic character sets. 10 IS0 8860-2 : 1987 (E) UDC 681327.63 Descriptors : data processing, information interchange, data recording devices, magnetic disks, flexible disks, track formats, specifications. Price based on 10 pages