JEDEC JESD82-20A-2009 FBDIMM Advanced Memory Buffer (AMB).pdf
《JEDEC JESD82-20A-2009 FBDIMM Advanced Memory Buffer (AMB).pdf》由会员分享,可在线阅读,更多相关《JEDEC JESD82-20A-2009 FBDIMM Advanced Memory Buffer (AMB).pdf(198页珍藏版)》请在麦多课文档分享上搜索。
1、JEDEC STANDARD FBDIMM Advanced Memory Buffer (AMB) JESD82-20A (Revision of JESD82-20, March 2007) MARCH 2009 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION SPECIAL DISCLAIMER: JEDEC has received information that certain patents or patent applications may be relevant to this standard, and, as of the public
2、ation date of this standard, no statements regarding an assurance or refusal to license such patents or patent applications have been provided. http:/www.jedec.org/download/search/FBDIMM/Patents.xls JEDEC does not make any determination as to the validity or relevancy of such patents or patent appli
3、cations. Prospective users of the standard should act accordingly. NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and
4、 publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by tho
5、se other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liab
6、ility to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The information included in JEDEC standards and publications represents a sound approach to product specification and application, principally from the solid state device ma
7、nufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become an ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inqu
8、iries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or call (703) 907-7559 or www.jedec.org Published by JEDEC Solid State Technology Association 2009 3103 North 10th Street Suite 240 South Arlington, VA 22
9、201-2107 This document may be downloaded free of charge; however JEDEC retains the copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Please refer to the current Catalog of JEDEC Engineering Standards and Publications
10、 online at http:/www.jedec.org/Catalog/catalog.cfm Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. Organizations may obtain permission to reproduce a limited number of copies through entering
11、into a license agreement. For information, contact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or call (703) 907-7559 Special Disclaimer JEDEC has received information that certain patents or patent applications may be relevant to this st
12、andard, and, as of the publication date of this standard, no statements regarding an assurance or refusal to license such patents or patent applications have been provided. http:/www.jedec.org/download/search/FBDIMM/Patents.xls JEDEC does not make any determination as to the validity or relevancy of
13、 such patents or patent applications. Prospective users of the standard should act accordingly. JEDEC Standard No. 82-20AiFBDIMM: Advanced Memory Buffer (AMB)ContentsContents . iList of Tables . vList of Figures . vi1 Introduction.11.1 Advanced Memory Buffer Overview .11.2 Advanced Memory Buffer Fun
14、ctionality11.2.1 Advanced Memory Buffer .11.2.2 Transparent Mode for DRAM Test Support21.2.3 Debug and Logic Analyzer Interface 21.2.4 DDR SDRAM21.3 Advanced Memory Buffer Block Diagram.31.4 Interfaces41.4.1 FBD High-Speed Differential Point-to-Point Link (at 1.5 V) Interfaces .41.4.2 DDR2 Channel .
15、41.4.3 SMBus Slave Interface .51.5 References .51.6 Glossary .52 FBD Channel Interface .82.1 Advanced Memory Buffer Support for FBD Operating Modes .82.2 Channel Initialization 82.3 Channel Protocol 82.3.1 General.82.3.2 Timeouts during TS0 82.3.3 Recalibrate state considerations 92.3.4 Address Mapp
16、ing of DDR Commands to DRAMs 102.3.5 FBD L0s State 102.4 Reliability, Availability, and Serviceability .112.4.1 General.112.4.2 Channel Error Detection and Logging 112.5 Channel Configuration112.5.1 Re-sync and Resample Modes 112.5.2 Other Channel Configuration Modes 122.5.3 Lane to Lane Skew on a C
17、hannel 122.6 Repeater Mode.132.7 Performance .132.7.1 Idle Memory Read Latency.132.8 AMB Components of Channel Latency 142.8.1 Command to Data Delay Calculation .152.8.2 Channel Throughput.173 DDR Interface183.1 Advanced Memory Buffer DDR Interface Overview .183.2 Data Mapping .183.2.1 Data Mask 183
18、.3 Command / Address Outputs .193.3.1 CKE Output Control20JEDEC Standard No. 82-20AiiFBDIMM: Advanced Memory Buffer (AMB)Contents (contd)3.3.2 Memory Controller / BIOS requirements 203.4 DQS I/O and DM Outputs.213.5 Refresh .223.5.1 Self-Refresh During Channel Reset .223.5.2 Automatic Refresh 223.6
19、Back to Back Turnaround Time 233.7 DDR Calibration233.7.1 DRAM Initialization and (E)MRS 243.7.2 Automatic DDR Bus Calibration .243.7.3 S3 Recovery Configuration Registers 253.7.4 Receive Enable Calibration 253.7.5 DQS Delay Calibration .253.8 DDR MEMBIST 253.8.1 MEMBIST Features 263.9 DIMM Organiza
20、tion.284 Electrical, Power, and Thermal .294.1 Electrical DC Parameters .294.1.1 Absolute maximum ratings .294.1.2 Normal Mode 304.1.3 S3 current Specification374.2 FBD Channel Interface .374.2.1 FBD Electrical Timing Specifications374.2.2 AMB Latency Parameters.384.3 DDR2 DRAM Interface Electrical
21、Specifications 424.4 DDR2 Electrical Output Timing Specifications .434.4.1 Description of DQ/DQS Alignment .434.4.2 Description of ADD/CMD/CNTL Outputs434.4.3 Test Load Specification 434.4.4 tDVA and tDVB Parameter Description 434.4.5 tjit and tjitHP Parameter Description.444.4.6 tCVA, tCVB, tECVA a
22、nd tECVB Parameter Description 444.4.7 tDQSCK Timing Parameter Description .454.4.8 DQ and CB (ECC) Setup/Hold Relationships to/from DQS (Read Operation) .454.4.9 Write Preamble Duration 464.4.10 Write Postamble Duration.464.4.11 Advance Memory Buffer Component Electrical Timing Summary474.4.12 Refe
23、rence DDR2 Interface Package Trace Lengths 484.5 SMBUS Interface.494.6 Misc I/O (1.5 CMOS Driver)494.7 Thermal Diode and Analog to Digital Converter (ADC) 504.7.1 Thermal Sensor Effects on the Advanced Memory Buffers Functional Behavior 505 Error Handling 515.1 Types of Errors and Responses .515.1.1
24、 FBD Link Errors 515.1.2 DDR Errors .525.1.3 Host Protocol Errors .535.1.4 Other Errors53JEDEC Standard No. 82-20AiiiFBDIMM: Advanced Memory Buffer (AMB)Contents (contd)5.2 Error Logging545.2.1 Error Logging Procedure 545.3 Fail Over Mode Support .545.4 Failback to Pass-Thru.546 Transparent Mode 556
- 1.请仔细阅读文档,确保文档完整性,对于不预览、不比对内容而直接下载带来的问题本站不予受理。
- 2.下载的文档,不会出现我们的网址水印。
- 3、该文档所得收入(下载+内容+预览)归上传者、原创作者;如果您是本文档原作者,请点此认领!既往收益都归您。
下载文档到电脑,查找使用更方便
10000 积分 0人已下载
下载 | 加入VIP,交流精品资源 |
- 配套讲稿:
如PPT文件的首页显示word图标,表示该PPT已包含配套word讲稿。双击word图标可打开word文档。
- 特殊限制:
部分文档作品中含有的国旗、国徽等图片,仅作为作品整体效果示例展示,禁止商用。设计者仅对作品中独创性部分享有著作权。
- 关 键 词:
- JEDECJESD8220A2009FBDIMMADVANCEDMEMORYBUFFERAMBPDF

链接地址:http://www.mydoc123.com/p-807326.html