JEDEC JESD51-2A-2008 Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air).pdf
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1、 JEDEC STANDARD Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air) JESD51-2A (Revision of JESD51-2, December 1995) JANUARY 2008 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, rev
2、iewed, and approved through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interc
3、hangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted wi
4、thout regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The information included
5、 in JEDEC standards and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimatel
6、y become an ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or ca
7、ll (703) 907-7559 or www.jedec.org Published by JEDEC Solid State Technology Association 2007 2500 Wilson Boulevard Arlington, VA 22201-3834 This document may be downloaded free of charge; however JEDEC retains the copyright on this material. By downloading this file the individual agrees not to cha
8、rge for or resell the resulting material. PRICE: Please refer to the current Catalog of JEDEC Engineering Standards and Publications online at http:/www.jedec.org/Catalog/catalog.cfm Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may
9、 not be reproduced without permission. Organizations may obtain permission to reproduce a limited number of copies through entering into a license agreement. For information, contact: JEDEC Solid State Technology Association 2500 Wilson Boulevard Arlington, Virginia 22201-3834 or call (703) 907-7559
10、 JEDEC Standard No. 51-2A -i- INTEGRATED CIRCUITS THERMAL TEST METHOD ENVIRONMENTAL CONDITIONS - NATURAL CONVECTION (STILL AIR) Foreword This document is in the JESD51 series of specifications that specify the methods to determine and report the thermal performance of integrated circuit packages. Th
11、e specification was formulated under the cognizance of the JC-15.1 Committee on Thermal Characterization Techniques for Electronic Packages and Interconnects. Introduction The purpose of this document is to outline the environmental conditions necessary to ensure accuracy and repeatability for a sta
12、ndard junction-to-ambient (JA) thermal resistance measurement in natural convection. Without the standardized control of the environment, the test results from different vendors or from different packages will not be consistent and cannot be used to judge relative performance. The intent of JAmeasur
13、ements is solely for a thermal performance comparison of one package to another in a standardized environment. This methodology is not meant to and will not predict the performance of a package in an application-specific environment. NOTE: “Still air” (in the title) signifies natural convection in a
14、n enclosure as opposed to a natural convection measurement made in a wind tunnel with the blower off. JEDEC Standard No. 51-2A -ii- JEDEC Standard No. 51-2A Page 1 INTEGRATED CIRCUITS THERMAL TEST METHOD ENVIRONMENTAL CONDITIONS - NATURAL CONVECTION (STILL AIR) (From JEDEC Board Ballot JCB-07-111, f
15、ormulated under the cognizance of the JC-15.1 Committee on Thermal Characterization Techniques for Electronic Packages and Interconnects. 1 Scope The environmental conditions described in this document will apply only to natural convection, JA, measurements for packages mounted on standard test boar
16、ds. The board will be placed in a horizontal (package up) position in an enclosure that prevents extraneous air currents and allows only natural convection generated by the package under test. 2 Normative reference The following normative documents contain provisions that, through reference in this
17、text, constitute provisions of this standard. For dated references, subsequent amendments to, or revisions of, any of these publications do not apply. However, parties to agreements based on this standard are encouraged to investigate the possibility of applying the most recent editions of the norma
18、tive documents indicated below. For undated references, the latest edition of the normative document referred to applies. 1 JESD51, Methodology for the Thermal Measurement of Component Packages (Single Semiconductor Devices). This is the overview document for this series of specifications. 2 JESD51-
19、1, Integrated Circuit Thermal Measurement Method - Electrical Test Method 3 JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages 4 JESD51-4, Thermal Test Chip Guideline (Wire Bond Type Chip) 5 JESD51-5, Extension of Thermal Test Board Standards for Packages with
20、Direct Thermal Attachment Mechanisms 6 JESD51-6, Integrated Circuit Thermal Test Method Environmental Conditions Forced Convection (Moving Air) 7 JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages 8 JESD51-8, Integrated Circuit Thermal Test Method Environmenta
21、l Conditions Junction-to-Board 9 JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements 10 JESD51-10, Test Boards for Through-Hole Perimeter Leaded Package Thermal Measurements 11 JESD51-11, Test Boards for Through-Hole Area Array Leaded Package Thermal Measurements 12 JESD5
22、1-12, Guidelines for Reporting and Using Electronic Package Thermal Information 13 JESD30D, Descriptive Designation System for Semiconductor-device Packages JEDEC Standard No. 51-2A Page 2 3 Terms and definitions For the purposes of this standard, the terms and definitions given in JESD51-1, Integra
23、ted Circuit Thermal Measurement Method - Electrical Test Method and the following apply: TA- Ambient air temperature. TA0- Initial ambient air temperature before heating power is applied. TAss- Final ambient air temperature after heating power is applied and steady-state has been reached. TT0- Initi
24、al package (top surface) temperature before heating power is applied. TTss- Final package (top surface) temperature after heating power is applied and steady-state has been reached. JB- Thermal characterization parameter to report the difference between junction temperature and the temperature of th
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