JEDEC JESD51-1-1995 Integrated Circuit Thermal Measurement Method - Electrical Test Method (Single Semiconductor Device)《集成电路热测方法-电测方法(单半导体器件)》.pdf
《JEDEC JESD51-1-1995 Integrated Circuit Thermal Measurement Method - Electrical Test Method (Single Semiconductor Device)《集成电路热测方法-电测方法(单半导体器件)》.pdf》由会员分享,可在线阅读,更多相关《JEDEC JESD51-1-1995 Integrated Circuit Thermal Measurement Method - Electrical Test Method (Single Semiconductor Device)《集成电路热测方法-电测方法(单半导体器件)》.pdf(36页珍藏版)》请在麦多课文档分享上搜索。
1、IA JESD.51-1 95 3234600 0567306 128 EINJEDEC STANDARD _ Integrated Circuit Thermal Measurement Method - Electrical Test Method (Single Semiconductor Device) EINJESD51-1 DECEMBER 1995 ELECTRONIC INDUSTRIES ASSOCIATION ENGINEERING DEPARTMENT COPYRIGHT Electronic Industries AllianceLicensed by Informat
2、ion Handling Services_- EIA JESDSL-1 95 3234600 0567L07 Ob4 NOTICE EWJEDEC Standards and Publications contain material that has been prepared, progressively reviewed, and approved through the JEDEC Council level and subsequently reviewed and approved by the EM General Counsel. EINJEDEC Standards and
3、 Publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchases, facilitating inkrchangeability and improvement of products, and assisting the purchaser is selecting and obtaining with minimum delay the proper product for hs particula
4、r need. Existence of such standards shail not in any respect preclude any member or nonmember of JEDEC from manufacturing or selling products not cunforming to such standards, nor shall the existence of such standards preclude their voluntary use by those other than ELA members, whether the standard
5、 is to be used either domestically or internationally. EINJEDEC Standards and Publications are adopted without regard to whether their adoption may involve patents or articles, materiais, or processes. By such action, EWJEDEC does not assume any liability to any patent owner, nor does it assume any
6、obligation whatever to parties adopting the EWJEDEC Standards or Publications. The information included in EWJEDEC Standards and Publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the EINJEDEC orga
7、nization there are procedures whereby an EWJEDEC Standard or Publication may be further processed and ultimately becomes an ANSUELA Standard. Inquiries, comments, and suggestions relative to the content of this EWJEDEC Standard or Publication should be addressed to the JEDEC Executive Secretary at E
8、M Headquarters, 2500 Wilson Boulevard, Arlington, VA 2220 1. Published by QELECTRONIC INDUSTRIES ASSOCIATION 1995 Engineering Department 2500 Wilson Boulevard Arlington, VA 2220 1 “Copyright“ does not apply to JEDEC member companies as they are free to duplicate this document in accordance with the
9、latest revision of the JEDEC Publication 2 1 “Manual of Organization and Procedure“. PRICE: Please refer to the current Catalog of EIA, JEDEC, and TIA STANDARDS and ENGINEERING PUBLICATIONS or call Global Engineering Documents, USA and Canada (1-800-854-7179) International (303397-7956) Printed in U
10、.S.A. All rights reserved COPYRIGHT Electronic Industries AllianceLicensed by Information Handling ServicesEIA JESDSL-L 75 3234600 05b7108 TTO PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by the EIA and may not be reproduced without permission. Organizations may obtain permission to re
11、produce a limited number of copies through entering into a license agreement. For information, contact: Global Engineering Documents 15 Inverness Way East Englewood, CO 801 12-5704 or call U.S.A. and Canada 1-800-854-7179, International (303) 397-7956 COPYRIGHT Electronic Industries AllianceLicensed
12、 by Information Handling ServicesEIA JESDSL-L 95 3234600 O567307 737 EINJEDEC Standard No. 51-1 INTEGRATED CIRCUIT THERMAL MEASUREMENT METHOD - ELECTRICAL TEST METHOD (SINGLE SEMICONDUCTOR DEVICE) CONTENTS 1. INTRODUCTION 1.1 PURPOSE 1.2 SCOPE 1.3 RATIONALE 1.4 REmRENCES 1.5 DEFINITIONS 2. MEASUREME
13、NT BASICS 2.1 TEMPERATURE-SENSITIE PARAMETER 2.1.1 MEASUREMENT CURRENT CONSIDERATIONS 2.1.2 K FACTOR CALIBRATION 2.2 COOLING TIME CONSIDERATIONS 2.3 HEATING TIME CONSIDERATIONS 2.4 TEST WAVEFORMS 2.5 ENVIRONMENTAL CONSIDERATIONS 2.6 TESTSETUP 3. MEASUREMENT PROCEDURE 3.1 3.1.1 3.1.2 3.2 3.3 3.4 3.4.
14、1 3.4.2 3.5 3.6 3.7 3.8 DEVICE CONNECTION THERMAL TEST DE ACTIVE DE MEASUREMENT CURRENT DETERMINATION K FACTOR CALIBRATION TEST CONDITION DETERMINATION HEATING CONDITIONS MEASUREMENT CONDITIONS TEST CONDITION CORRECTION DATA VALIDITY TEST CONDITION SUMMARY THERMAL STEADY-STATE DETERMINATION 4. DATA
15、CORRECTION AND PRESENTATION ANNEX A DEFTNITIONS (informative) 3 4 4 5 6 7 8 10 11 12 12 12 13 14 16 18 18 18 20 22 24 25 25 27 - 30 -1- COPYRIGHT Electronic Industries AllianceLicensed by Information Handling ServicesEIA JESD51-1 95 9 3234600 0567110 b59 9 This page intentionally lefi blank 1. -11-
16、COPYRIGHT Electronic Industries AllianceLicensed by Information Handling Services - EIA JESD5L-L 95 E 3234b00 05b7LLL 595 EWJEDEC Standard No. 5 1 - 1 Page 1 INTEGRATED CIRCUIT THERMAL MEASUREMENT METHOD - ELECTRICAL TEST METHOD (SINGLE SEMICONDUCTOR DEVICE) (From JEDEC Council Ballot JCB-95-29, for
17、mulated under the cognizance of JC-15 Committee on Electrical and Thermal Characterization Techniques for Electronic Packages and Interconnects.) 1. INTRODUCTION 1.1 PURPOSE The purpose of this test method is to define a standard Electrical Test Method (ETM) that can be used to determine the thermal
18、 characteristics of single integrated circuit devices housed in some form of electronic package. This method will provide a basis for comparison of different devices housed in the same electronic package or similar devices housed in different electronic packages. By virtue of the standardizing of ai
19、l pertinent terms, this method also improves the communication and exchange of information relative to the thermal characteristics of electronic packages housing a single semiconductor device. 1.2 SCOPE The measurement method described herein is equally applicable to both thermal test die and active
20、 intemted circuit devices. Thermal test die, consisting of a heat source and temperature sensor integrated into a semiconductor chip, are commonly used for package thermal characterization efforts, especially when one package is being compared to another. Integrated circuit devices, operating in an
21、active mode that approximates intended applications, are used when specific application-oriented specification information is required. The measurement is limited to a single die (either test die or active die) housed in a package intended for a single die. 1.3 RATIONALE Increased requirements for s
22、emiconductor performance, reliability, quality, and lower cost have forced the need for knowledge of the semiconductor device junction temperature. However, without a well-defined standard methodology for making thermal measurements, it has become increasingly difficult to accurately determine junct
23、ion temperature under actual operating and environmental conditions. Knowing the semiconductor device thermal resistance for a specific electronic package allows both the manufacturer and user to determine the junction temperature of the device. COPYRIGHT Electronic Industries AllianceLicensed by In
24、formation Handling Services EIA JESD51-1 95 m 3234600 0567LL2 421 m EINJEDEC Standard No. 5 1-1 Page 2 Accurate and correct thermal measurements are difficult to make because of the many variables that impact the final results. Electrical considerations (such as power, voltage and current levels, in
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