JEDEC JESD22-A111A-2010 Evaluation Procedure for Determining Capability to Bottom Side Board Attach by Full Body Solder Immersion of Small Surface Mount Solid State Devices.pdf

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1、JEDEC STANDARD Evaluation Procedure for Determining Capability to Bottom Side Board Attach by Full Body Solder Immersion of Small Surface Mount Solid State Devices JESD22-A111A (Revision of JESD22-A111, May 2004) NOVEMBER 2010 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publi

2、cations contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequently reviewed and approved by the JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings betwe

3、en manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationa

4、lly. JEDEC standards and publications are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC

5、 standards or publications. The information included in JEDEC standards and publications represents a sound approach to product specification and application, principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard o

6、r publication may be further processed and ultimately become an ANSI standard. No claims to be in conformance with this standard may be made unless all requirements stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication shou

7、ld be addressed to JEDEC at the address below, or call (703) 907-7559 or www.jedec.org Published by JEDEC Solid State Technology Association 2010 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retains the copyright on thi

8、s material. By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Please refer to www.jedec.org Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permissi

9、on. Organizations may obtain permission to reproduce a limited number of copies through entering into a license agreement. For information, contact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or call (703) 907-7559 JEDEC Standard No. 22-A

10、111A -i- Test Method A111A (Revision of Test Method A111) EVALUATION PROCEDURE FOR DETERMINING CAPABILITY TO BOTTOM SIDE BOARD ATTACH BY FULL BODY SOLDER IMMERSION OF SMALL SURFACE MOUNT SOLID STATE DEVICES Introduction Frequently, small Surface Mount Devices (SMDs) are attached to the bottom side o

11、f a printed circuit board by passing them through a wave solder (full body immersion) while simultaneously soldering devices with pins on the top of the board (plated through hole attach). As a result, these small SMDs may be exposed to high temperatures as high as 265 C during this type of board at

12、tach method. If sufficient moisture exists in the package, exposure to the molten solder causes the moisture to turn to vapor, resulting in increased pressure within the package which in turn may cause quality and/or reliability degradation. The test method in this document will address the issues r

13、elated to the determination of the capability of a solid state device to withstand the stresses of full body wave solder immersion and subsequent field use. JEDEC Standard No. 22-A111A Test Method A111A -ii- (Revision of Test Method A111) JEDEC Standard No. 22-A111A Page 1 Test Method A111A (Revisio

14、n of Test Method A111) EVALUATION PROCEDURE FOR DETERMINING CAPABILITY TO BOTTOM SIDE BOARD ATTACH BY FULL BODY SOLDER IMMERSION OF SMALL SURFACE MOUNT SOLID STATE DEVICES (From JEDEC Board Ballot JCB-10-19, formulated under the cognizance of the JC-14.1 Subcommittee on Reliability Test Methods for

15、Packaged Devices.) 1 Scope This evaluation procedure is written to provide USERs of ICs of small surface mount packages with a method to evaluate the capability of a component to withstand full wave solder immersion. Typically packages capable of full body solder immersion (wave solder immersion) bo

16、ard attach have pitch greater than 0.5 mm. There is only limited demonstrated capability to survive full body (wave solder) immersion attach for QFP and/or packages with bodies larger than 5.5 mm x 12.5 mm (or die paddle size greater than 2.5 mm x 3.5 mm). Packages with limited or no data for capabi

17、lity demonstration should not be wave soldered. The capability of a package for full body immersion is strongly affected by structure. Large body packages may have reliability and quality problems induced by such a board attach method. Die and paddle sizes, as well as wavesolder conditions (board si

18、ze, package profile, speed, part density, etc.), are some of the factors that modulate quality and reliability problems. If wave solder immersion results in a different Moisture Sensitivity Level than the J-STD-020 solder reflow level specified by the supplier, the user must take appropriate precaut

19、ions to ensure that new floor life is not exceeded during the users manufacturing processes. The purpose of this test method is to identify the potential wave solder classification level of small plastic Surface Mount Devices (SMDs) that are sensitive to moisture-induced stress so that they can be p

20、roperly packaged, stored, and handled to avoid subsequent mechanical damage during the assembly wave solder attachment and/or repair operations. This test method also provides a reliability preconditioning sequence for small SMDs that are wave soldered using full body immersion. This test method, ma

21、y be used by users to determine what classification level should be used for initial board level reliability qualification. 2 Applicable documents JESD625, Requirements for handling Electrostatic Discharge Sensitive (ESD) Devices JESD47, Stress Test Driven Qualification Specification J-STD-020, Mois

22、ture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Devices JESD22-A113, Preconditioning Procedures of Plastic Surface Mount Devices Prior to Reliability Testing J-STD-035, Acoustic Microscopy for Non-Hermetic Encapsulated Electronic Components JEP113, Symbol and Labels for M

23、oisture Sensitive Devices JEDEC Standard No. 22-A111A Page 2 Test Method A111A (Revision of Test Method A111) 3 Apparatus 3.1 Bake oven Ovens capable of operating at 125 C +5/-0 C, for use in drying(baking) the SMDs. 3.2 Temperature Humidity Chambers Moisture chamber(s), capable of operating at 85 C

24、/85% RH, 85 C/60% RH, 60 C/60% RH, and 30 C/60% RH. Within the chamber working area, temperature tolerance must be 2 C and the RH tolerance must be 3%. 3.3 Wave Solder equipment Wave solder equipment with preheat; capable of up to 260 C (+5/-0 C) solder temperature. 3.4 Solder dip machine Solder dip

25、 machine capable of up to 260 C (+5/-0 C) solder temperature for full body immersion evaluation. 3.5 Optical microscope Optical microscope should be capable of 40x magnification for external visual examination and 100X magnification for cross-section examination. 3.6 Electrical test equipment Electr

26、ical test equipment should be capable of performing at least room temperature DC and functional tests. 3.7 Scanning Acoustic Microscope Scanning acoustic microscope should be capable of C-Mode and Through Transmission capability and capable of measuring a minimum delamination of 5% of the area being

27、 evaluated. NOTE 1 The scanning acoustic microscope is used to detect cracking and delamination. However, the presence of delamination does not necessarily indicate a pending reliability problem. The reliability impact of delamination must be established for a particular die/package system. NOTE 2 R

28、efer to IPC/JEDEC J-STD-035 for operation of the scanning acoustic microscope. JEDEC Standard No. 22-A111A Page 3 Test Method A111A (Revision of Test Method A111) 4 Classification/reclassification This test method provides four possible classifications with two solder temperature classifications (24

29、5 C and 260 C) and two dip conditions (single dip and dual dip). The test conditions must be reported with the classification results. Two types of solder procedures are allowed, wave solder and manual dip soldering. Table 1 Wave solder simulation conditions Reflow method Test conditions Wave solder

30、 Solder dip Preheat Temperature 25 to 140 C 145 C Preheat Time 80 seconds min 15 seconds min 245 C Classification 245C +5/-0 C 245C +5/-0 C Solder Temperature 260 C Classification 260C +5/-0 C 260C +5/-0 C Single Wave Simulation 5 +/-1 seconds 5 +/-1 seconds Extended Single Wave Simulation 10 +/-1 s

31、econds 10 +/-1 seconds Solder Immersion Time Dual Wave Simulation First Wave + Second Wave = 10 +/-1 seconds 10 +/-1 seconds NOTE Bottom side board attach of small Surface Mount Devices by full immersion in wave solder requires special evaluation of the packages. The profile elements such as preheat

32、, dwell and peak temperatures vary from process to process. Yet the ability of small packages to be exposed to such treatment depends on these parameters. Assessment by dipping in a solder pot usually exposes devices to higher stresses than the wave solder procedure, which results in induced failure

33、s. In summation packages that would be attached by wave solder immersion require special evaluations by the USER due to the wave solder process differences. 5 Moisture classification/reclassification procedure 5.1 Requirements for floor life The recommended soak condition and soak time for determini

34、ng the desired floor life is shown in Table 2. 5.1.1 Sample requirements Select a minimum sample of 22 units for each moisture sensitivity level to be tested. Sample groups may be run concurrently on one or more moisture sensitivity levels. 5.2 Initial electrical test Test appropriate electrical par

35、ameters (e.g., Data sheet values, in house specifications, etc.). Replace any devices that fail to meet tested parameters. JEDEC Standard No. 22-A111A Page 4 Test Method A111A (Revision of Test Method A111) 5 Moisture classification/reclassification procedure (contd) 5.3 Initial inspection Perform a

36、n initial external visual and acoustic microscope examination to establish a baseline for the cracking/delamination criteria in 6.3.1. NOTE This standard does not consider or establish any time zero requirements for delamination. 5.4 Bake requirements Bake the sample for 24 hours minimum at 125 +5/-

37、0 C. This step is intended to remove moisture from the package so that it will be “dry.“ NOTE This time/temperature may be modified if desorption data on the particular device under test shows that a different condition is required to obtain a “dry“ package when starting in the wet condition for 85

38、C /85% RH. See 7c. 5.5 Moisture soak Place devices in a clean, dry, shallow container so that the bodies of parts do not touch or overlap each other. Submit each sample to the appropriate soak requirements shown in Table 2. (At all times, parts should be handled using proper ESD procedures in accord

39、ance with JESD625.) Table 2 Moisture sensitivity levels Soak requirements Floor life Standard Accelerated equivalent 1Level Time Conditions Time (hours) Conditions Time (hours) Conditions 1 Unlimited 30 C/85% RH 168 85 C/85% RH 2 1 Year 30 C/60% RH 168 85 C/60% RH 2a 4 Weeks 30 C/60% RH 696230 C/60%

40、 RH 120 60C/60% RH 3 168 Hours 30 C/60% RH 192230 C/60% RH 40 60C/60% RH 4 72 Hours 30 C/60% RH 96230 C/60% RH 20 60C/60% RH 5 48 Hours 30 C/60% RH 72230 C/60% RH 15 60C/60% RH 5a 24 Hours 30 C/60% RH 48230 C/60% RH 10 60C/60% RH 6 6 hours 30 C/60% RH Time on Label 30 C/60% RH NOTE 1 To use the “Acc

41、elerated Equivalent” soak requirements; correlation of damage response, including electrical, after soak and reflow must be established with the “Standard” soak requirements. Accelerated soak times may vary due to material properties (e.g., Mold compound, encapsulant, etc.) NOTE 2 Standard soak time

42、 includes default value for semiconductor Manufacturers Exposure Time (MET) between bake and bag plus the maximum time allowed out of the bag at the distributors facility is 24 hrs. If the actual MET is less than 24 hrs the soak time may be reduced. For soak conditions of 30 C/60% RH the soak time i

43、s reduced by 1 hr. for each hour the MET is less than 24 hrs. For soak conditions of 60 C/60% RH the soak. Time is reduced by 1 hr. for each 5 hours the MET is less than 24 hrs. JEDEC Standard No. 22-A111A Page 5 Test Method A111A (Revision of Test Method A111) 5 Moisture classification/reclassifica

44、tion procedure (contd) 5.5 Moisture soak (contd) NOTE 2 (contd) If the actual MET is greater than 24 hrs the soak time must be increased. If soak conditions are 30 C/60% RH, the soak time is increased 1 hr. for each hour that the actual MET exceeds 24 hrs. If soak conditions are 60 C/60% RH, the soa

45、k time is increased 1 hr. for each 5 hrs that the actual MET exceeds 24 hrs 5.6 Reflow Not sooner than fifteen (15) minutes and not longer than four (4) hours after removal from the temperature/humidity chamber, subject the sample to the reflow conditions per Table 1. 5.6.1 Wave solder procedure Not

46、 sooner than fifteen (15) minutes and not longer than four (4) hours after removal from the temperature/humidity chamber, submit the devices to: a) Preparation The bottom surface of the device specimen shall be adhered to holder by adhesive agent specified in the relevant specification. Unless other

47、wise specified in the relevant specification, the flux shall not be applied to the specimen and holder at this point in the wavesolder procedure. NOTE If flux is applied, vaporization of solvent in the flux hinders rising temperature of the specimen. Therefore the flux shall not be applied to the bo

48、dy of the specimen and should be applied to the lead pins as little as possible (if it is desirable that the effect of fluxing on reliability be evaluated, fluxing may be applied after the wave solder) b) Preheating Unless otherwise specified in the relevant specification, the specimen shall be preh

49、eated in such a way that so as the package temperature shall go from 25 C to 140 C in 80 seconds minimum. c) Wave Solder (Heating) Following preheating, the specimen shall be passed through the wave solder as appropriate per table 1 JEDEC Standard No. 22-A111A Page 6 Test Method A111A (Revision of Test Method A111) 5.6 Reflow (contd) 5.6.2 Solder Dip procedure (alternative to wave solder) NOTE When using this method care should be taken to insure that the package body temperature does not exceed the temperature