JEDEC JESD15-1-2008 Compact Thermal Model Overview.pdf
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1、JEDEC STANDARD Compact Thermal Model Overview JESD15-1 OCTOBER 2008 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed, and approved through the JEDEC Board of Directors level and subsequently reviewed and approved by th
2、e JEDEC legal counsel. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minim
3、um delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally. JEDEC standards and publications are adopted without regard to whether or not their adoption may involve patents or articles, materials, or processes. By
4、such action JEDEC does not assume any liability to any patent owner, nor does it assume any obligation whatever to parties adopting the JEDEC standards or publications. The information included in JEDEC standards and publications represents a sound approach to product specification and application,
5、principally from the solid state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC standard or publication may be further processed and ultimately become an ANSI standard. No claims to be in conformance with this standard may be made unless all require
6、ments stated in the standard are met. Inquiries, comments, and suggestions relative to the content of this JEDEC standard or publication should be addressed to JEDEC at the address below, or call (703) 907-7559 or www.jedec.org Published by JEDEC Solid State Technology Association 2008 3103 North 10
7、th Street Suite 240 South Arlington, VA 22201-2107 This document may be downloaded free of charge; however JEDEC retains the copyright on this material. By downloading this file the individual agrees not to charge for or resell the resulting material. PRICE: Please refer to the current Catalog of JE
8、DEC Engineering Standards and Publications online at http:/www.jedec.org/Catalog/catalog.cfm Printed in the U.S.A. All rights reserved PLEASE! DONT VIOLATE THE LAW! This document is copyrighted by JEDEC and may not be reproduced without permission. Organizations may obtain permission to reproduce a
9、limited number of copies through entering into a license agreement. For information, contact: JEDEC Solid State Technology Association 3103 North 10th Street Suite 240 South Arlington, VA 22201-2107 or call (703) 907-7559 JEDEC Standard No. 15-1 Page 1 COMPACT THERMAL MODEL OVERVIEW DOCUMENT (From J
10、EDEC Board Ballot JCB-08-28, formulated under the cognizance of the JC-15.1 Committee on Thermal Characterization.) 1 Scope This document should be used in conjunction with the master document, “Methodology for the Thermal Modeling of Component Packages1”, the “Terms and Definitions document2”, and
11、subsidiary documents as they become available. This document is intended to function as an OVERVIEW to support the effective use of Compact Thermal Model (CTM) methodologies as specified in the companion methods documents. At present, there are two such documents: “Two-Resistor Compact Thermal Model
12、 Guideline3” and “DELPHI Compact Thermal Model Guideline4.” The planned structure for this set of documents is indicated in Figure 1. Figure 1 Diagram indicating modular structure of CTM documents This OVERVIEW is intended to provide a context for the comparison of CTM methods by defining a number o
13、f qualitative criteria. A procedure for quantifying the relative accuracy of different CTM methods by the calculation of Boundary Condition Independence (BCI) and Boundary Condition Subset (BCS) Indices will be specified in the future document, BCI Esprit III project no. 22797; 1997-1998) and PROFIT
14、 (Prediction of Temperature Gradients Influencing the Quality of Electronic Products; European Community IST Program, project no. 12529; 2000 2002). The CTM work was released into the public domain by means of reports and publications. Members of the DELPHI, SEED, and PROFIT projects have continued
15、to be active in the JC15 committee to promote an awareness of developments in CTM methodology and to participate in standardization efforts. The JEDEC activities have emphasized enhancing the practical application of the DELPHI methods and, as much as possible, leveraging the existing JEDEC thermal
16、standards to facilitate the adoption of these methods by the electronics industry, world-wide. 7 Criteria for comparison of CTM methods A number of criteria have been established in order to provide a context for the comparison of CTM methods. They will be applied in this document to CTM methods def
17、ined by subsidiary documents. Is the CTM test based or simulation based? o A model may be extracted directly from test results or from simulations that, themselves, have been validated with test results. Does the CTM contain an artifact of the test environment? o A model extracted directly from test
18、 results may have embedded in it the contribution of different heat flow paths and the resultant temperature differences caused by the test fixturing and test environment. In general, CTMs that contain an artifact of the test environment will have lower accuracy than those that do not. JEDEC Standar
19、d No. 15-1 Page 5 7 Criteria for comparison of CTM methods (contd) Does the CTM generation methodology inherently include an error analysis? o Simulation-based methods typically include this as a by-product of the optimization procedure to determine the best-fit values of the resistors in the CTM ne
20、twork. Methods that assign values to the resistors in a CTM directly from experimental measurements do not include an error analysis of the CTM as an integral part of the process of generating the resistor values. Calculation of BCI and BCS Indices. o A method of calculating a BCI Index will be spec
21、ified in a future document. (This document is indicated in the roadmap as, “BCI b. The side surfaces of the package. It then is transmitted into the ambient fluid. c. The package bottom surface and leads. It then flows into the PCB. 4) Thermal resistor networks are used to represent the heat flow pa
22、ths. 5) Each external surface of the part may be considered to be at a single temperature represented by one node. Alternatively, the external surfaces can be subdivided into regions each with a single temperature corresponding to one node. The CTM methods defined by JEDEC are the Two-Resistor Model
23、 and the DELPHI Model. They are described below. 9.1 Two-Resistor CTM The Two-Resistor CTM represents the heat flow paths described in 3a and 3c (above) in the simplest possible way, namely using a single thermal resistor for each. This is illustrated in Figure 2. Note that for the two resistor mode
24、l, the heat path described in 3b is ignored. JCtopJBBoard NodeCase NodeJunction NodeFigure 2 Two-Resistor Model Network Topology JEDEC Standard No. 15-1 Page 7 9 CTM methods (contd) 9.1 Two-Resistor CTM (contd) The Two-Resistor Model consists of three nodes as depicted in the Figure 2. These are con
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