JEDEC JESD13-B-1980 Description of B Series CMOS Devices Spec for《种类》.pdf
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1、STANDARD SPECIFICATION FOR DESCRIPTION OF “6“ SERIES CMOS DEVICES MAY 1980 - (Revision of JEDEC Tentative Standard No. 13-A) PRICE: $12.00 FORMULATED BY JEDEC SOLID STATE PRODUCTS COUNCIL JEDEC STANDARD NO. 13-6 NOTICE This JEDEC Standard contains material which has been prepared and progress- ively
2、 reviewed and approved through the JEDEC Council level and subsequently reviewed and approved by the EIA General Counsel, JEDEC Standards are designed to serve. the public interest through eliminating misunderstandings bet ween manufacturers and purchasers, faci I i tat ing inter- changeability and
3、improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for his particular need. Existence of such standards shall not in any respect preclude any member or non-member of JEDEC from manufacturing or selling products not conforming to such
4、 standards, nor shall the existence of such standards preclude their voluntary use by those other than EIA members whether the standard is to be used either domestically or internationally. Recommended standards are adopted by JEDEC without regard to whether or not their adoption may involve patents
5、 or articles, materials, or processes. By such action JEDEC does not assume any liability to any patent owner, nor does it assume any ob1 igation whateveteto parties adopting the recommended standards. This information included in JEDEC Standards represents a sound approach to product specification
6、and appl ication, principally from the sold state device manufacturer viewpoint. Within the JEDEC organization there are procedures whereby a JEDEC Standard may be further processed and ultimately become an EIA Standard. Inquiries, commentis, and suggestions relative to the content of this JEDEC Sta
7、ndard should be addressed to the JEDEC Executive Secretary at the EIA Headquarters, JEDEC Electronic Indust ries Association 2001 Eye Street N.W. Washington, D.C. 20006 - - - _- . EIA JESDL3-B 80 m 3234600 0004957 8 m O O STANDARD SPECIFICATION FOR DESCRIPTION OF llB1l SERIES CMOS DEVICES TABLE OF C
8、ONTENTS Paragraph 1.0 Purpose and Scope 2.0 Definitions 3.0 Standard Specification TABLE 1 TABLES 2 - 24 JEDEC Standard No. 13-8 Paqe 1 2 5-6 7-41 . EIA JESDL3-B 80 W 3234600 0004958 T W JEDEC Page 1 * Standard No. 13-6 * STANDARD SPECIFICATION FOR DESCRIPTION OF “B“ SERIES CMOS DEVICES (From JEDEC
9、Council Ballot JCB-80-6, formulated under the cognizance of JEDEC Subcommittee JC-40.2 on CMOS Standardization.) 1.0 PURPOSE AND SCOPE 1.1 Purpose To develop a standard of “BI1 Series CMOS Specification to provide for uniformity, multiplicity of sources, elimination of confusion, and ease of device
10、specif ication and system design by users. 1.2 Scope This Tentative Standard covers standard specifications for description of W1I Series CMOS Devices. O 2.0 DEFINITIONS 2.1 “Btl Series “B“ Series CMOS includes both buffered and unbuffered devices. 2.2 Buffered A buffered device output is one that h
11、as the characteristic. that the output llonll impedance is independent of any and all valid input logic conditions, both preceding and present. Unbuffered - see paragraph 3.4 for definition. 2.3 I EIA JESDL3-B 0 3234b00 0004959 L = JEDEC Standard No. 13-6 Page 2 3.0 STANDARD SPECIFICATION 3.1 Listin
12、g of Standard Specifications 3.1.1 Table 1 lists the standard dc specifications for “6“ Series CMOS devices. 3.1.1.1 Table 24 lists the IOL and IOH standard .specification specifically for the 4049U6 and 40506 types. For IDD, use same specification as for Buffers/Flip Flops in Table 1; also VOH, VOL
13、, VIH, VIL, and IIN are the sameas in Table 1. 3.1.2 Analog Switch Standard 3.1.2.1 Table 2 lists dc standard specifications specifically for the 40166 type. For IDD, use same specification as for Gates in Table 1; also II and Ci are the same as in Table 1. . 3.1.2.2 Table 3 lists dc standard specif
14、ications specifically for the 40666 type. For IDD, use same specification as for Gates in Table 1; also II and Ci are the same as in Table 1. 3.1.2.3 Standardized test conditions for additional analog-switch . parameters are listed in Table 4. AC Standards - see paragraph 3.1.3. 3.1.2.4 3.1.3 AC Sta
15、ndard Specifications 3.1.3.1 AC (Dynamic) Parameter Standard Test Methods and Defi- ni tions Figure 1 - Figures 2-5 - Waveform Definitions Table 5 - List of Dynamic Electrical Characteristics. Test Configuration and Conditions 3.1.3.2 Standard ac Parameter Limits Table 6 - Buffered Gates Table 7 - U
16、nbuffered Gates Table 8 - Flip Flops (40136 and 40276) Table 9 - Analog Switch (40166) Table 10- Analog Switch (40668) Table 11- Exclusive OR/NOR Gates (40706 and 40776) Table 12- And-OR Invert Gates (40858) and (40866) EIA JESDl3-B 0 = 3234600 0004760 8 = JEDEC Standard No. 13-8 Page 3 3.1.3.2 Stan
17、dard ac Parameter Limits (continued) Table 13- Table 14- Table 15- . Table 16- Table 17- Table 18- Table 19- Table 20- Table 21- Table 22- Table 23- 40768 45148 and 45158 45328 45558 and 45568 401748 and 401758 40998, 47238 and 47248 45088 4049UB 40508 4510B, 45168 45188, 45208. 3,2 Absolute Maximum
18、 Ratings In the maximum ratings listed below, voltages are referenced to Vss. ABSOLUTE MAXIMUM RATINGS DC Supply Voltage VDD -0.5 to +18 V Input Voltage DC Input Current VI -0.5 to VDD -I- 0.5 V II - +10 mA Storage Temperature Range TSTG -65 to +150 OC 3.3 Recommended Operating Conditions Recommende
19、d operating voltages are listed below. RECOMMENDED OPERATING CONDITIONS DC Supply Voltage VDD +3 to +15 V Operating Ambient TA Temperature Range Military -Range Devices -55 to +175 OC Commercial-Range Devices -40 to +85 OC EIA JESDL3-B BO = 3234600 00049bl T = c JEDEC Standard No, 1343 Page 4 I. 3.4
20、 Designation of irBic Series CMO.5 Devices Those parts which! have analog inputs and/or outputs shall be included in the Wtl Series providing those parts maximum ratings and logical input and output pararnet.ers conform ta the iBii Series, such as (including, butnot limited to): 40466 . Devices with
21、 Bipolar Outputs I Analog Switches Analog Multiplexers. Monostable and Astable Multivibrators Schmitt Triggers Products that meet ii3ii Series specifications except that the logical outputs are not buffered and the VIL and VIH specifications differ from iiBii Series as shown in Table 1: shall be mar
22、ked with, the _. UB designation, such as (including, but not limited to): 4000UB 4001UB 4002UB 4007UB 4009UB 4011UB 4012UB 4023UB 4025UB 4041UB 4049UB 4069UB 4441UB 4449UB 4501UB 457.2UB EIA JESDL3-B 0 3234b00 00049b2 L JEDEC Standard No. 13-8 Page 5 ? rim* q .?Z mo VIOC rim rimu 9 ?Y FI “ * i-: ? F
23、IOU 9 ?“! 4“ “! 99 99. i m-2 lu*: I ? ?C moo ooc dN N*O: z ? rimu 9 9“) rl“ I I “! 39 99. 7 2 i= a !=! k k n a a O Cl W o U d r2 Z I- Ln I U W J m 2 x ZR s sl mom mou -4 mom mou rlr Ji- - w E- IPROBLEM HARD COPY .o : EIA JESDL3-B 80 m 3234600 0004963 3 m JEDEC Standard No. 13-8 Page 6 73 ? ii 73 ? 1
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