EN 62326-20-2016 en Printed boards - Part 20 Printed circuit boards for highbrightness LEDs.pdf

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1、Printed boardsPart 20: Printed circuit boards for high-brightness LEDsBS EN 62326-20:2016BSI Standards PublicationWB11885_BSI_StandardCovs_2013_AW.indd 1 15/05/2013 15:06National forewordThis British Standard is the UK implementation of EN 62326-20:2016. It isidentical to IEC 62326-20:2016.The UK pa

2、rticipation in its preparation was entrusted to TechnicalCommittee EPL/501, Electronic Assembly Technology.A list of organizations represented on this committee can be obtained onrequest to its secretary.This publication does not purport to include all the necessary provisions ofa contract. Users ar

3、e responsible for its correct application. The British Standards Institution 2016.Published by BSI Standards Limited 2016ISBN 978 0 580 76702 9ICS 31.180Compliance with a British Standard cannot confer immunity fromlegal obligations.This British Standard was published under the authority of theStand

4、ards Policy and Strategy Committee on 31 May 2016.Amendments/corrigenda issued since publicationDate Text affectedBRITISH STANDARDBS EN 62326-20:2016EUROPEAN STANDARD NORME EUROPENNE EUROPISCHE NORM EN 62326-20 May 2016 ICS 31.180 English Version Printed boards - Part 20: Printed circuit boards for

5、high-brightness LEDs (IEC 62326-20:2016) Cartes imprimes - Partie 20: Cartes de circuits imprims destines aux LED haute luminosit (IEC 62326-20:2016) Leiterplatten - Teil 20: Elektronische Leiterplatte fr Hochleistungs-LEDs (IEC 62326-20:2016) This European Standard was approved by CENELEC on 2016-0

6、3-09. CENELEC members are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such national standards may be obt

7、ained on application to the CEN-CENELEC Management Centre or to any CENELEC member. This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified

8、to the CEN-CENELEC Management Centre has the same status as the official versions. CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic, Denmark, Estonia, Finland, Former Yugoslav Republic of Macedonia, France, Germany, Greec

9、e, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, the Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland, Turkey and the United Kingdom. European Committee for Electrotechnical Standardization Comit Europen de Normalisation Electro

10、technique Europisches Komitee fr Elektrotechnische Normung CEN-CENELEC Management Centre: Avenue Marnix 17, B-1000 Brussels 2016 CENELEC All rights of exploitation in any form and by any means reserved worldwide for CENELEC Members. Ref. No. EN 62326-20:2016 E BS EN 62326-20:2016EN 62326-20:2016 2 E

11、uropean foreword The text of document 91/1311/FDIS, future edition 1 of IEC 62326-20, prepared by IEC/TC 91 “Electronics assembly technology“ was submitted to the IEC-CENELEC parallel vote and approved by CENELEC as EN 62326-20:2016. The following dates are fixed: latest date by which the document h

12、as to be implemented at national level by publication of an identical national standard or by endorsement (dop) 2016-12-09 latest date by which the national standards conflicting with the document have to be withdrawn (dow) 2019-03-09 Attention is drawn to the possibility that some of the elements o

13、f this document may be the subject of patent rights. CENELEC and/or CEN shall not be held responsible for identifying any or all such patent rights. Endorsement notice The text of the International Standard IEC 62326-20:2016 was approved by CENELEC as a European Standard without any modification. In

14、 the official version, for Bibliography, the following notes have to be added for the standards indicated: IEC 60068-1 NOTE Harmonized as EN 60068-1. IEC 60068-2-1 NOTE Harmonized as EN 60068-2-1. IEC 60068-2-2 NOTE Harmonized as EN 60068-2-2. IEC 60068-2-6 NOTE Harmonized as EN 60068-2-6. IEC 60068

15、-2-20 NOTE Harmonized as EN 60068-2-20. IEC 60068-2-21 NOTE Harmonized as EN 60068-2-21. IEC 60068-2-30 NOTE Harmonized as EN 60068-2-30. IEC 60068-2-38 NOTE Harmonized as EN 60068-2-38. IEC 60068-2-53 NOTE Harmonized as EN 60068-2-53. IEC 60068-2-58 NOTE Harmonized as EN 60068-2-58. IEC 60068-2-64

16、NOTE Harmonized as EN 60068-2-64. IEC 60068-2-66 NOTE Harmonized as EN 60068-2-66. IEC 60068-2-78 NOTE Harmonized as EN 60068-2-78. IEC 60068-2-80 NOTE Harmonized as EN 60068-2-80. IEC 61189-1 NOTE Harmonized as EN 61189-1. BS EN 62326-20:2016EN 62326-20:2016 3 IEC 61189-2 NOTE Harmonized as EN 6118

17、9-2. IEC 61189-11 NOTE Harmonized as EN 61189-11. IEC 61189-3-913 NOTE Harmonized as EN 61189-3-913. IEC 61190-1-1 NOTE Harmonized as EN 61190-1-1. IEC 61190-1-2 NOTE Harmonized as EN 61190-1-2. IEC 61190-1-3 NOTE Harmonized as EN 61190-1-3. IEC 61249-2-8 NOTE Harmonized as EN 61249-2-8. IEC 62137-1

18、-3 NOTE Harmonized as EN 62137-1-3. IEC 62137-1-4 NOTE Harmonized as EN 62137-1-4. IEC 62326-1 NOTE Harmonized as EN 62326-1. IEC 62326-4 NOTE Harmonized as EN 62326-4. ISO 291 NOTE Harmonized as EN ISO 291. ISO 2409 NOTE Harmonized as EN ISO 2409. ISO 3599 NOTE Harmonized as EN ISO 3599. ISO 3611 N

19、OTE Harmonized as EN ISO 3611. ISO 4957 NOTE Harmonized as EN ISO 4957. ISO 291 NOTE Harmonized as EN ISO 291. ISO 6906 NOTE Harmonized as EN ISO 6906. ISO 8512-1 NOTE Harmonized as EN ISO 8512-1. ISO 8512-2 NOTE Harmonized as EN ISO 8512-2. ISO 9445-1 NOTE Harmonized as EN ISO 9445-1. ISO 9453 NOTE

20、 Harmonized as EN ISO 9453. ISO 9454-1 NOTE Harmonized as EN ISO 9454-1. ISO 9455 (series) NOTE Harmonized as EN ISO 9455 (series). ISO 13385-1 NOTE Harmonized as EN ISO 13385-1. ISO 15184 NOTE Harmonized as EN ISO 15184. BS EN 62326-20:2016EN 62326-20:2016 4 Annex ZA (normative) Normative reference

21、s to international publications with their corresponding European publications The following documents, in whole or in part, are normatively referenced in this document and are indispensable for its application. For dated references, only the edition cited applies. For undated references, the latest

22、 edition of the referenced document (including any amendments) applies. NOTE 1 When an International Publication has been modified by common modifications, indicated by (mod), the relevant EN/HD applies. NOTE 2 Up-to-date information on the latest versions of the European Standards listed in this an

23、nex is available here: www.cenelec.eu. Publication Year Title EN/HD Year IEC 60194 - Printed board design, manufacture and assembly - Terms and definitions EN 60194 - IEC 61189-3 2007 Test methods for electrical materials, printed boards and other interconnection structures and assemblies - Part 3:

24、Test methods for interconnection structures (printed boards) EN 61189-3 2008 IEC 61249-2-6 - Materials for printed boards and other interconnecting structures - Part 2-6: Reinforced base materials, clad and unclad - Brominated epoxide non-woven/woven E-glass reinforced laminated sheets of defined fl

25、ammability (vertical burning test), copper-clad EN 61249-2-6 - IEC 61249-2-7 - Materials for printed boards and other interconnecting structures - Part 2-7: Reinforced base materials, clad and unclad - Epoxide woven E-glass laminated sheet of defined flammability (vertical burning test), copper-clad

26、 EN 61249-2-7 - IEC 62878-1-1 - Device embedded substrate - Generic specification - Test method EN 62878-1-1 - BS EN 62326-20:2016 2 IEC 62326-20:2016 IEC 2016 CONTENTS FOREWORD . 6 1 Scope 8 2 Normative references. 8 3 Terms, definitions and abbreviations 8 3.1 Terms and definitions 8 3.2 Abbreviat

27、ions 8 4 Classification and class of the printed circuit board for high-brightness LEDs 9 5 Design rules and allowance . 10 5.1 Panel and board sizes . 10 5.1.1 Board size . 10 5.1.2 Allowance of dimensions 11 5.1.3 Perforation and slit . 11 5.1.4 V-cut 12 5.2 Total board thickness 13 5.3 Holes 14 5

28、.3.1 Insertion holes and vias . 14 5.3.2 Datum hole 16 5.3.3 Assembly hole (a through-hole without wall plating) 16 5.4 Conductor . 17 5.4.1 Width of conductor pattern and its allowance 17 5.4.2 Distance between conductors and its allowance 17 5.4.3 Thickness of the insulating layer . 18 5.5 Printed

29、 contact 18 5.5.1 Allowance of the distance between the centers of two adjacent printed contacts . 18 5.5.2 Allowance of the terminal width of printed contacts . 19 5.5.3 Shift of the center of printed contacts on front and back sides of a board . 19 5.6 Land pattern . 20 5.6.1 Allowance of the dist

30、ance between the centers of two lands 20 5.6.2 Allowance of the width of a land . 20 5.6.3 Land diameter and its allowance for BGA/CSP 21 5.7 Fiducial mark and mark for component positioning . 22 5.7.1 Typical form and size of the fiducial mark . 22 5.7.2 Dimensional allowance of fiducial mark and c

31、omponent positioning mark 23 5.7.3 Position allowance of the component positioning mark 23 5.8 Interlayer connection Copper plating . 23 6 Quality 24 6.1 Gap between conductor and the wall of a component insertion hole or a via . 24 6.2 Positional deviation between conductor layers of a multilayer b

32、oard . 24 6.3 Minimum land width . 24 6.4 Surface treatment . 25 6.4.1 Gold plating for printed contact . 25 6.4.2 Other surface treatment . 26 6.5 Defects of solder resist 26 6.6 Symbol mark . 28 6.6.1 General . 28 BS EN 62326-20:2016IEC 62326-20:2016 IEC 2016 3 6.6.2 Conductor surface 28 6.6.3 Bet

33、ween conductors . 28 6.6.4 Defects within insulating layers 29 6.6.5 Routing and drilling 30 6.6.6 Conductor pattern 30 6.7 Land . 30 6.8 Land of a land pattern . 31 6.9 Defects in a land for BGA/CSP mounting . 32 6.10 Printed contact 32 7 Performance and test methods . 34 7.1 Resistance of conducto

34、rs 34 7.2 Current proof of conductor and plated through hole 35 7.3 Observation of component mountings and vias 36 7.3.1 Observation with standard conditions . 36 7.3.2 Observation after thermal shock test 38 8 Marking, packaging and storage . 39 8.1 Marking on a product . 39 8.2 Marking on the pack

35、age 39 8.3 Packaging and storage 40 8.3.1 Packaging 40 8.3.2 Storage 40 Annex A (informative) Classification and class of the PCB for high-brightness LEDs 41 Bibliography . 46 Figure 1 Example of a classification and its application . 10 Figure 2 Board arrangement in a panel . 11 Figure 3 Distances

36、from the datum point to perforation and slit . 12 Figure 4 Distance from the datum point to the V-cut 12 Figure 5 Allowance of position off-set of V-cuts on front and back surfaces . 13 Figure 6 PWB board with symbol mark, solder resist, copper foil and plating . 13 Figure 7 Positions of component i

37、nsertion holes . 15 Figure 8 Distance between the wall of a hole and the board edge . 15 Figure 9 Wall of a hole and the minimum designed spacing to the inner conductor . 16 Figure 10 Width of finished conductor . 17 Figure 11 Distance between conductor and board edge 18 Figure 12 Thickness of the i

38、nsulating layer . 18 Figure 13 Distance between centers of terminals of printed contacts . 19 Figure 14 Terminal width of a printed contact . 19 Figure 15 Shift of the center of printed contacts on front and back sides of a board 20 Figure 16 Land pattern . 20 Figure 17 Land width of a land pattern

39、21 Figure 18 Land diameter of BGA/CSP formed of a conductor only . 21 Figure 19 Land diameter (d) of BGA/CSP formed at the opening of solder resist . 22 Figure 20 Examples of fiducial mark and component positioning mark . 23 Figure 21 Minimum land width 25 BS EN 62326-20:2016 4 IEC 62326-20:2016 IEC

40、 2016 Figure 22 Exposure of conductor 26 Figure 23 Minimum land with caused by the shift of solder resist . 27 Figure 24 Overlap, smear and shift of solder resist . 27 Figure 25 Examples of smear or blur 28 Figure 26 Example of measling 29 Figure 27 Examples of crazing . 29 Figure 28 Conductor nicks

41、 30 Figure 29 Conductor residue 30 Figure 30 Land 31 Figure 31 Defects in a land of a land pattern. 31 Figure 32 Defects in BGA/CSP mounting lands . 32 Figure 33 Areas to be checked for defects of a printed contact 33 Figure 34 Defects in a printed contact 33 Figure 35 Relations between resistance a

42、nd width, thickness and temperature of a conductor . 35 Figure 36 Relationship between current, conductor width and thickness and temperature rise . 36 Figure 37 Defect on a plating of a component hole . 37 Figure 38 Resin smear . 38 Figure 39 Corner crack 38 Figure 40 Barrel crack 39 Figure 41 Foil

43、 crack . 39 Figure A.1 Relation between thermal conductive parameter and heat transfer coefficient parameter 42 Table 1 Application and classification . 9 Table 2 Panel dimensions 11 Table 3 Allowance of dimensions . 11 Table 4 Allowance of the distances from the datum point to perforation and slit

44、12 Table 5 Allowance of the distance from the datum point to the center of the V-cut . 13 Table 6 Total thickness and its allowance . 14 Table 7 Allowance of holes for component insertion 14 Table 8 Position allowance of component insertion holes 15 Table 9 Distance between the wall of a hole and bo

45、ard edge 16 Table 10 Minimum clearance between the wall of a hole and the inner layer conductor . 16 Table 11 Allowance of conductor width . 17 Table 12 Allowance of the distance between conductors . 18 Table 13 Allowance of terminal width of a printed contact . 19 Table 14 Allowance of terminal wid

46、th of a printed contact . 20 Table 15 Allowance of the width of a land of a land pattern . 21 Table 16 Land diameter and its allowance for BGA/CSP . 22 Table 17 Allowance of the land diameter (d) of BGA/CSP formed at the opening of solder resist 22 BS EN 62326-20:2016IEC 62326-20:2016 IEC 2016 5 Tab

47、le 18 Shapes and sizes of typical fiducial marks and component positioning marks . 23 Table 19 Minimum thickness of copper plating 23 Table 20 Minimum thickness of copper plating 24 Table 21 Minimum land width . 27 Table 22 Overlap, smear and shift of solder resist over a fool print 28 Table 23 Allo

48、wance of the area of a defect, remaining width and protrusion of a land . 31 Table 24 Defect of a land of a land pattern . 32 Table 25 Defects in BGA/CSP mounting lands 32 Table 26 Defects in a printed contact . 34 Table 27 Specification and test methods of resistance of conductors . 34 Table 28 Spe

49、cification and test methods of current proof 35 Table 29 Allowance in horizontal sectioning 38 Table A.1 Relation between thermal conductive parameter and heat transfer coefficient parameter 42 Table A.2 Related test methods 43 BS EN 62326-20:2016 6 IEC 62326-20:2016 IEC 2016 INTERNATIONAL ELECTROTECHNICAL COMMISSION _ PRINTED BOARDS Part 20: Printed circuit boar