ECMA 373-2012 Near Field Communication Wired Interface (NFC-WI) (2nd Edition).pdf

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1、 Reference numberECMA-123:2009Ecma International 2009ECMA-373 2ndEdition / June 2012 Near Field Communication Wired Interface (NFC-WI) COPYRIGHT PROTECTED DOCUMENT Ecma International 2012 Ecma International 2012 iContents Page 1 Scope 1 2 Conformance . 1 3 Normative references 1 4 Terms and definiti

2、ons . 1 5 Conventions and notations 1 5.1 Representation of bit values 1 5.2 Representation of logical states of LOW and HIGH . 1 5.3 Capitalisation of names 2 5.4 State notation . 2 6 Acronyms . 2 7 General . 2 8 Signals 3 8.1 Signal wires 3 8.1.1 Signal-In . 3 8.1.2 Signal-Out 3 8.2 Electrical cha

3、racteristics 3 8.3 Clock frequency (fCLK) . 4 9 NFC-WI states 4 9.1 Off state 5 9.2 Activating state 5 9.2.1 Signal-Out activation . 6 9.2.2 Signal-In activation 6 9.3 On state 7 9.3.1 Idle . 8 9.3.2 Busy 8 9.4 De-Activating state 8 9.4.1 Signal-Out deactivation 9 9.4.2 Signal-In deactivation . 9 9.

4、5 Command state 9 9.5.1 Escape sequence 9 10 Information-Transfer . 10 10.1 Manchester Bit coding 10 10.2 Modified Miller Bit coding . 10 10.3 Bit coding for fCLK/128 (106 kb/s) . 11 10.3.1 Signal-Out 11 10.3.2 Signal-In . 11 10.4 Bit coding for fCLK/64 (212 kb/s) . 11 10.4.1 Signal-Out 11 10.4.2 Si

5、gnal-In . 12 10.5 Bit coding for fCLK/32 (424 kb/s) . 12 Annex A (informative) Application of NFC-WI with NFCIP-1 13 A.1 General . 13 A.2 Reference . 13 A.3 Propagation delay . 13 A.4 Communication Mode . 13 A.5 RF-field control during activation 13 A.5.1 Activation without RF-field . 13 ii Ecma Int

6、ernational 2012A.5.2 Activation with RF-field .14 A.6 Signal diagrams .15 A.6.1 fCLK/128 15 A.6.2 fCLK/64 16 Annex B (informative) Command state .17 B.1 Configuration .17 Ecma International 2012 iiiface his 2ndedition is fully aligned with the 1stedition of ISO/IEC 28361:2007. This Ecma Standard has

7、 been adopted by the General Assembly of June 2012. Introduction Following the standardisation of Near Field Communication (NFC) systems and their test methods in Ecma International, this Standard specifies a two-wire interface between two components called “Transceiver” and “Front-end”. Systems tha

8、t implement the NFC-WI interface can thus be augmented with e.g. a wireless Front-end for NFCIP-1 as illustrated in Figure 1. Although this Standard only specifies requirements for the Signal-In and Signal-Out wires and the digital signals they carry, informative Annex A lists some NFCIP-1 specific

9、considerations. NFCTransceiverSignal-OutSignal-InDevice (e.g. NFCIP-1)NFCFront-EndNFC WiredInterface(NFC-WI)In scopeOut of ScopeOut of ScopeFigure 1 Context diagram for the NFC wired interTiv Ecma International 2012“COPYRIGHT NOTICE This document may be copied, published and distributed to others, a

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12、atures that provide accessibility, (iii) translations of this document into languages other than English and into different formats and (iv) works by making use of this specification in standard conformant products by implementing (e.g. by copy and paste wholly or partly) the functionality therein.

13、However, the content of this document itself may not be modified in any way, including by removing the copyright notice or references to Ecma International, except as required to translate it into languages other than English or into a different format. The official version of an Ecma International

14、document is the English language version on the Ecma International website. In the event of discrepancies between a translated version and the official version, the official version shall govern. The limited permissions granted above are perpetual and will not be revoked by Ecma International or its

15、 successors or assigns. This document and the information contained herein is provided on an “AS IS“ basis and ECMA INTERNATIONAL DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO ANY WARRANTY THAT THE USE OF THE INFORMATION HEREIN WILL NOT INFRINGE ANY OWNERSHIP RIGHTS OR A

16、NY IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE.“ Ecma International 2012 1Near Field Communication Wired Interface (NFC-WI) 1 Scope This Standard specifies the digital wire interface between a Transceiver and a Front-end. The specification includes the signal wires, bin

17、ary signals, the state diagrams and the bit encodings for three data rates. 2 Conformance Conformant Transceivers and Front-ends implement the wired interface specified herein. 3 Normative references None. 4 Terms and definitions For the purposes of this document, the following terms and definitions

18、 apply. 4.1 Clock sequence of LOW and HIGH as defined in 5.2 with duration of 1/(2*fCLK), where fCLKis the clock frequency as defined in 8.3 4.2 Information Bit-coded data as defined in Clause 10 4.3 Front-end entity that drives the Signal-Out wire and receives on the Signal-In wire 4.4 Transceiver

19、entity that drives the Signal-In wire and receives on the Signal-Out wire 5 Conventions and notations 5.1 Representation of bit values Bit values are either ZERO or ONE. 5.2 Representation of logical states of LOW and HIGH The logical signal state is LOW if the electric al level of a signal has the

20、input voltage of VILor the output voltage of VOLas specified in Table 1 in 8.2. 2 Ecma International 2012 The logical signal state is HIGH if the electric al level of a signal has the input voltage of VIHor the output voltage of VOHas specified in Table 1 in 8.2. 5.3 Capitalisation of names The init

21、ial character of names of basic elements, e.g. specific fields, is capitalised. 5.4 State notation The states are specified in Unified Modelling Language (UML) notation. 6 Acronyms AND Logical AND operation fCLK Clock frequency as defined in 8.3 NFC-WI Near Field Communication Wired Interface OR Log

22、ical OR operation XOR Logical XOR operation Divide a clock frequency by a constant value. Table 1 in 8.2 lists additional symbols for electrical characteristics. 7 General The NFC-Wired Interface (NFC-WI) specifies the Signal-In and the Signal-Out wires as illustrated in Figure 2. The wires carry bi

23、nary signals of HIGH and LOW. NFCTransceiverSignal-OutSignal-InNFCFront-EndNFC WiredInterface(NFC-WI)In scopeFigure 2 NFC-WI The combinations of the signals on the wires make up the NFC-WI states as defined in Clause 9. Clause 10 specifies encodings for Information transfer, while in the On state, f

24、or the fCLK/128, fCLK/64 and fCLK/32 data transfer rates. Annex A lists NFCIP-1 specific considerations for implementing the NFC-WI; Annex B lists possible uses of the Command state, such as changing to alternative protocols. Ecma International 2012 38 Signals 8.1 Signal wires 8.1.1 Signal-In The Tr

25、ansceiver drives the Signal-In wire with a binary signal of HIGH and LOW. The Front-end receives the binary signal on Signal-In. 8.1.2 Signal-Out The Front-end drives the Signal-Out wire with a binary signal of HIGH and LOW. The Transceiver receives the binary signal on Signal-Out. 8.2 Electrical ch

26、aracteristics The wires shall carry (binary) digital signals as illustrated in Figure 3 and specified in Table 1. Figure 3 Illustration of some electrical parameters 4 Ecma International 2012Table 1 Electrical characteristics Symbol Parameter Conditions Min Max UnitDC Characteristics VSSignalling vo

27、ltage amplitude Not applicable 1,62 3,63 V VIHHIGH level input voltage Not applicable 1,10 3,63 V VILLOW level input voltage Not applicable 0 0,70 V ILIInput leakage current Input voltage is between VILminand VIHmax 4 mA VOHHIGH level output voltage Driver source current of 4mA 1,32 3,63 V VOLLOW le

28、vel output voltage Driver sink current of 4mA 0 0,30 V AC Characteristics trSignal-In, Signal-Out rise time (from 10 % to 90 % of VS) Add an external capacitive load between 10 pF and 30 pF for testing 4 20 ns tfSignal-In, Signal-Out fall time (from 90 % to 10 % of VS) Add an external capacitive loa

29、d between 10 pF and 30 pF for testing 4 20 ns tSPPulse width of spikes and glitches which must be suppressed by the input filter Not applicable 1 ns CIInput capacitance 1 MHz test frequency 10 pF CLExternal load capacitance for the driver Not applicable 30 pF VITRInput voltage range at signal transi

30、tions Not applicable 0,30 3,93 V Pulse width Not applicable 30 ns Environmental / Test Conditions TambAmbient temperature for electrical characteristics measurements Not applicable 20 26 C 8.3 Clock frequency (fCLK) The clock frequency (fCLK) shall be 13,56 MHz 7 kHz. 9 NFC-WI states Figure 4 specif

31、ies the main NFC-WI states. The Off state and the On state are the main NFC-WI states. The Off state is the default state. NFC-WI shall move from the Off state to the On state as specified in 9.2. NFC-WI shall move from the On state to the Off state as specified in 9.4. Ecma International 2012 5NFC-

32、WI shall move from the On state to the Command state via the Escape sequence. OffOnActivating DeactivatingCommandFigure 4 Main states of NFC-WI 9.1 Off state When Signal-In and Signal-Out are LOW for at least 120 s, the NFC-WI state shall be Off. NOTE In this state, power saving features may be impl

33、emented. 9.2 Activating state The NFC-WI shall enter the Activating state when either Signal-Out or Signal-In carry the activation sequence, as specified in 9.2.1 and 9.2.2 respectively. When subsequently the opposite wire carries the activation response, the NFC-WI shall enter the On state, as show

34、n in Figure 5. ActivatingWait Signal-InWait Signal-OutACT_REQ_So ACT_REQ_SiACT_RES_SoACT_RES_SiFigure 5 Activating state 6 Ecma International 20129.2.1 Signal-Out activation When the Signal-Out wire carries the ACT_REQ_So, the NFC-WI shall enter the Activating state. When Signal-In carries the ACT_R

35、ES_Si no later than 50 ms after entering the Activating state the NFC-WI shall enter the On state. Otherwise the NFC-WI shall enter the Off state. The activation sequence is illustrated in Figure 6 and Figure 7. TransceiverFront-endACT_REQ_SoACT_RES_SiFigure 6 Signal-Out activation 9.2.1.1 ACT_REQ_S

36、o The Clock on the Signal-Out wire constitutes the ACT_REQ_So as illustrated in the upper part of Figure 7. 9.2.1.2 ACT_RES_Si The HIGH on Signal-In constitutes the ACT_RES_Si as illustrated in the lower part of Figure 7. HIGHLOWSignal on Signal-IntHIGHLOWSignal on Signal-OutOff StatetOn StateActiva

37、tingStatemax. 50msFigure 7 Signal-Out initiated activation sequence 9.2.2 Signal-In activation When the Signal-In wire carries the ACT_REQ_Si, the NFC-WI shall enter the Activating state. When Signal-Out carries the ACT_RES_So within a period of between 100 s and 50 ms after entering the Activating

38、state the NFC-WI shall enter the On state. Otherwise the NFC-WI shall enter the Off state. Ecma International 2012 7The activation sequence is illustrated in Figure 8 and Figure 9. TransceiverFront-endACT_REQ_SiACT_RES_SoFigure 8 Signal-In activation 9.2.2.1 ACT_REQ_Si At least 127 pulses with a fre

39、quency in the range of 2 MHz to 12 MHz on Signal-In constitute the ACT_REQ_Si as illustrated in the upper part of Figure 9. Subsequently Signal-In shall be HIGH. 9.2.2.2 ACT_RES_So The Clock on the Signal-Out wire constitutes the ACT_RES_So as illustrated in the lower part of Figure 9. HIGHLOWSignal

40、 on Signal-InOff StatetOn StateHIGHLOWSignal on Signal-OuttActivating State100s 50msFigure 9 Signal-In initiated activation sequence 9.3 On state The On state consists of the Idle and Busy sub states; Idle is the default sub-state of On, as shown in Figure 10. 8 Ecma International 2012OnIdleBusyFigu

41、re 10 The On state 9.3.1 Idle While in the On state, in the absence of Information-transfer, the On sub-state shall be Idle. In the Idle sub-state, Signal-In shall carry HIGH, and Signal-Out shall carry the Clock. 9.3.2 Busy While in the On state, during Information-transfer on either Signal-In or S

42、ignal-Out, the On sub-state shall be Busy. 9.4 De-Activating state The NFC-WI shall enter the De-Activating state when either Signal-Out or Signal-In carry the deactivation sequence as specified in 9.4.1 and 9.4.2 respectively. When subsequently the opposite wire carries the deactivation response, t

43、he NFC-WI shall enter the Off state, see Figure 11. De-ActivatingWait Signal-InWait Signal-OutDEAC_REQ_So DEAC_REQ_SiDEAC_RES_SoDEAC_RES_SiFigure 11 De-Activating state Ecma International 2012 99.4.1 Signal-Out deactivation When Signal-Out carries DEACT_REQ_So, the NFC-WI shall enter De-Activating s

44、tate. Within 50 ms, the Signal-In shall carry DEACT_RES_Si, and the NFC-WI shall enter the Off state. 9.4.1.1 DEACT_REQ_So Signal-Out set to LOW for more than 120 s constitutes the DEACT_REQ_So. 9.4.1.2 DEACT_RES_Si Signal-In set to LOW constitutes the DEACT_RES_Si. 9.4.2 Signal-In deactivation When

45、 Signal-In carries DEACT_REQ_Si, the NFC-WI shall enter De-Activating state. Within 50 ms, the Signal-Out shall carry DEACT_RES_So, and the NFC-WI shall enter the Off state. 9.4.2.1 DEACT_REQ_Si Signal-In set to LOW for more than 120 s constitutes the DEACT_REQ_Si. 9.4.2.2 DEACT_RES_So Signal-Out se

46、t to LOW constitutes the DEACT_RES_So. 9.5 Command state The Command state shall be entered from the On state using the Escape sequence. The default bit coding in Command state shall be as defined in 10.3, Bit coding for fCLK/128. The Command state is exited with a command. The command set is outsid

47、e the scope of this Standard. 9.5.1 Escape sequence At least 127 pulses with a frequency in the range from 2 MHz to 12 MHz on Signal-In constitute the Escape sequence as illustrated in Figure 12. Subsequently Signal-In shall be HIGH. HIGHLOWSignal on Signal-InOn StatetHIGHLOWSignal on Signal-OuttCom

48、mand StateFigure 12 Escape sequence 10 Ecma International 201210 Information-Transfer This Clause specifies the bit coding for three data rates. 10.1 Manchester Bit coding The Manchester bit coding encodes ONE and ZERO in a LOW to HIGH transition in the middle of a bit period as illustrated in Figur

49、e 13. The first half of the bit is HIGH and the second half of the bit is LOW for a ONE. The first half of the bit is LOW and the second half of the bit is HIGH for a ZERO. Reverse polarity shall be permitted. Figure 13 Manchester bit coding 10.2 Modified Miller Bit coding The Modified Miller bit coding defines ONE and ZERO by the position of a pulse during one bit period. The pulse is a transition from HIGH to LOW, followed by a period of LOW, followed by a transition to HIGH. The bit representation is illustrated i