DLA SMD-5962-97592 REV A-2007 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS W CLEAR AND PRESET MONOLITHIC SILICON《微型电路 数字型 双极 带清.pdf

《DLA SMD-5962-97592 REV A-2007 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS W CLEAR AND PRESET MONOLITHIC SILICON《微型电路 数字型 双极 带清.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-97592 REV A-2007 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS W CLEAR AND PRESET MONOLITHIC SILICON《微型电路 数字型 双极 带清.pdf（13页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 07-02-07 Joseph D. Rodenbeck REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Larry E. Shaw DEFENS

2、E SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Tuan D. Nguyen COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Raymond L. Monnin MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, DUAL POSITIVE-EDGE- AND AGENCIES

3、 OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 97-05-30 TRIGGERED D-TYPE FLIP-FLOPS W/CLEAR AND PRESET, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-97592 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E629-06 Provided by IHSNot for ResaleNo reproduction or networking perm

4、itted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97592 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (dev

5、ice classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as sho

6、wn in the following example: 5962 - 97592 01 Q C X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices m

7、eet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). Th

8、e device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54F74 Dual positive-edge-triggered D-type flip-flops with clear and preset 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level a

9、s follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The cas

10、e outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or GDFP2-F14 14 Flat package 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specifie

11、d in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97592 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 RE

12、VISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to +7.0 V Input voltage range (VIN) . -1.2 V to +7.0 V 2/ Input current range (IIN) . -30 mA and +5 mA Maximum power dissipation (PD) 88 mw Voltage range applied to any output in the hig

13、h state . -0.5 V to VCCCurrent into any output in the low state . 40 mA Storage temperature range . -65C to +150C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V to 5.5 V High-level in

14、put voltage (VIH) . 2 V minimum Low-level input voltage (VIL) 0.8 V maximum Input clamp current (IIK) . -18 mA maximum High-level output current (IOH) . -1 mA maximum Low-level output current (IOL) 20 mA maximum Case operating free-air temperature (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Gover

15、nment specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICAT

16、ION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard M

17、icrocircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Or

18、der of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above

19、the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ The input voltage ratings may be exceeded provided the input current ratings are observed. Provided by IHSNot for ResaleNo reproduction or

20、 networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97592 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and

21、V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be i

22、n accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, a

23、ppendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram.

24、 The logic diagram shall be as specified on figure 3. 3.2.5 Test circuit and timing waveforms. The test circuit and timing waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical p

25、erformance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each s

26、ubgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not mar

27、king the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance

28、mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall b

29、e required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). T

30、he certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, ap

31、pendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for devi

32、ce class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring acti

33、vity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in m

34、icrocircuit group number 10 (see MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97592 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 22

35、34 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max Input clamp voltage VIKVCC= 4.5 V, II= -18 mA 1, 2, 3 -1.2 V High-level output voltage VOHVCC= 4.5 V, IOH= -1 mA 1, 2, 3 2.5 V Low level ou

36、tput voltage VOLVCC= 4.5 V, IOL= 20 mA 1, 2, 3 0.5 V Input current IIVCC= 5.5 V, VI= 7 V 1, 2, 3 0.1 mA High level input current IIHVCC= 5.5 V, VI= 2.7 V 1, 2, 3 20 A Low level input current IILFor Data and CLK pins, VCC= 5.5 V, VI= 0.5 V 1, 2, 3 -0.6 mA For PRE or CLR pins, VCC= 5.5 V, VI= 0.5 V -1

37、.8 Output short circuit current 1/ IOSVCC= 5.5 V, VO= 0 V 1, 2, 3 -60 -150 mA Supply current ICCVCC= 5.5 V 2/ 1, 2, 3 16 mA Functional test 3/ VIN= VIHMin or VILMax Verify output VOVCC= 4.5 V, See 4.4.1b 7, 8 L H VIN= VIHMin or VILMax Verify output VOVCC= 5.5 V, See 4.4.1b 7, 8 L H Clock frequency f

38、CLKVCC= 5 V 9 100 MHz VCC= 5.5 V 10, 11 80 Pulse duration twVCC= 5.0 V, CLK high, PRE or CLR low 9 4 ns VCC= 5.5 V, CLK high, PRE or CLR low 10, 11 4 VCC= 5.0 V, CLK low 9 5 VCC= 5.5 V, CLK low 10, 11 6 Hold time, data after CLK thHigh, VCC= 5.0 V 9 1 ns High, VCC= 5.5 V 10, 11 2 See footnotes at en

39、d of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97592 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance charac

40、teristics - Continued. Test Symbol Conditions -55C TC +125C Group A subgroups Limits Unit unless otherwise specified Min Max Hold time, data after CLK thLow, VCC= 5.0 V 9 1 ns Low, VCC= 5.5 V 10, 11 2 Setup time, data before CLK tsuHigh, VCC= 5.0 V 9 2 ns High, VCC= 5.5 V 10, 11 3 Low, VCC= 5.0 V 9

41、3 ns Low, VCC= 5.5 V 10, 11 4 Setup time, inactive-state before CLK tsuVCC= 5.0 V, 3/ PRE or CLR to CLK 9 2 ns VCC= 5.5 V, 3/ PRE or CLR to CLK 10, 11 3 Maximum frequency fmax4/ 5/ 9 100 MHz 10, 11 80 Propagation delay time, low-to-high level output, tPLH9 3.8 6.8 ns from CLK to Q or Q output 1/ 10,

42、 11 3.8 8.5 Propagation delay time, high-to-low level output, tPHL9 4.4 8 ns from CLK to Q or Q output 1/ 10, 11 4.4 10.5 Propagation delay time, low-to-high level output, tPLH9 3.2 6.1 ns from PRE or CLR to Q or Q output 2/ 10, 11 3.2 8 Propagation delay time, high-to-low level output, tPHL9 3.5 9

43、ns from PRE or CLR to Q or Q output 2/ 10, 11 3.5 11.5 1/ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. 2/ ICCis measured with D, CLK, and PRE grounded then with D, CLK, and CLR grounded. 3/ Inactive state setup time is also

44、 referred to as recovery time. 4/ For group A subgroup 9, VCC= 5.0 V, CL= 50 pF, and RL= 500 . fmax= 100 MHz min 5/ For group A subgroups 10, 11, VCC= 4.5 V to 5.5 V, CL= 50 pF, and RL= 500 . fmax= 80 MHz min Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I

45、HS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97592 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 Case outlines C and D 2 Terminal number Terminal symbol 1 1 CLR NC 2 1D 1 CLR 3 1CLK 1D 4 1 PRE 1CLK 5 1Q NC 6 1 Q 1PRE 7 GND NC 8 2 Q 1Q 9 2

46、Q 1 Q 10 2 PRE GND 11 2CLK NC 12 2D 2 Q 13 2 CLR 2Q 14 VCC2 PRE 15 NC 16 2CLK 17 NC 18 2D 19 2 CLR 20 VCCFIGURE 1. Terminal connections. INPUTS OUTPUTS PRE CLR CLK D Q Q L H X X H L H L X X L H L L X X H * H* H H H H L H H L L H H H L X Q0Q0* The output levels are not guaranteed to meet the minimum

47、levels for VOH. Furthermore, this configuration is nonstable; that is, it will not persist when PRE or CLR returns to its inactive (high) level. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE

48、 A 5962-97592 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. See notes on next sheet. FIGURE 4. Test circuit and timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97592 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacita