DLA SMD-5962-97589 REV A-2007 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS MONOLITHIC SILICON《微型电路 数字型 双极 改进型肖特基晶体管晶体管逻辑.pdf

《DLA SMD-5962-97589 REV A-2007 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS MONOLITHIC SILICON《微型电路 数字型 双极 改进型肖特基晶体管晶体管逻辑.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-97589 REV A-2007 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS MONOLITHIC SILICON《微型电路 数字型 双极 改进型肖特基晶体管晶体管逻辑.pdf（14页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update drawing to current requirements. Editorial changes throughout. - gap 07-01-12 Joseph D. Rodenbeck REV SHET REV SHET REV STATUS REV A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Kenneth Rice DE

2、FENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Larry Shaw COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Raymond L. Monnin MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, OCTAL TRANSPARENT D-TYPE AND AGE

3、NCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 97-06-24 LATCHES WITH 3-STATE OUTPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-97589 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E626-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without

4、 license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q

5、 and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the fol

6、lowing example: 5962 - 97589 01 Q R X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-P

7、RF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type

8、(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54F373 Octal D-type Latch with 3-state outputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requiremen

9、ts documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD

10、-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line package S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classe

11、s Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 223

12、4 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to 7.0 V dc Input voltage . -1.2 V dc to 7.0 V dc Input current range . -30 mA to 5 mA Current into any output in the low state . 40 mA Voltage range applied to any output in the disabled or power-off state . -0.5 V to

13、5.5 V Voltage range applied to any output in the high state . -0.5 V to VCCOperating free-air temperature range . -55C to +125C Maximum power dissipation (PD) 2/ 500 mW Storage temperature range . -65C to +150C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) . 17

14、5C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Input clamp current (IIK) -18 mA Minimum high level input voltage (VIH) +2.0 V Maximum low level input voltage (VIL) . +0.8 V Maximum high level output current (IOH) . -3 mA Maximum low level output current

15、(IOL) . +20 mA Operating free-air temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the iss

16、ues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standa

17、rd Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the St

18、andardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supers

19、edes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Must withstand the added PDdue to

20、short-circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1

21、 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as de

22、scribed herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specif

23、ied in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth

24、table. The truth table shall be as specified on figure 2. 3.2.4 Logic symbol and logic diagram. The logic symbol and logic diagram shall be as specified on figure 3. 3.2.5 Test circuit and timing waveforms. The test circuit and timing waveforms shall be as specified on figure 4. 3.3 Electrical perfo

25、rmance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements

26、. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking o

27、f the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. M

28、arking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-3

29、8535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required

30、 from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q

31、and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A

32、 shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawin

33、g. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.1

34、0 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 10 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING

35、 SIZE A 5962-97589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Min Max Unit IOH= -1 mA 2.5 High level

36、output voltage VOHVCC= 4.5 V, VIH= 2.0 V, VIL= 0.8 V IOH= -3 mA 1, 2, 3 2.4 V Low level output voltage VOLVCC= 4.5 V, IOL= 20 mA VIH= 2.0 V, VIL= 0.8 V 1, 2, 3 0.5 V Input clamp voltage VIKVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.2 V Input current IIVCC= 5.5 V, VIN= 7 V Inputs not under test 4.5 V 1, 2, 3

37、 0.1 mA Low level input current IILVCC= 5.5 V, VIN= 0.5 V Inputs not under test 4.5 V 1, 2, 3 -0.6 mA High level input current IIHVCC= 5.5 V, VIN= 2.7 V Inputs not under test 4.5 V 1, 2, 3 20 A Output short circuit current IOSVCC= 5.5 V, VOUT= 0.0 V 1/ 1, 2, 3 -60 -150 mA Off state output leakage cu

38、rrent IOZHVCC= 5.5 V, VOUT= 2.7 V 1, 2, 3 50 A Off state output leakage current IOZLVCC= 5.5 V, VOUT= 0.5 V 1, 2, 3 -50 A Off state power supply current ICCZVCC= 5.5 V 2/ 1, 2, 3 55 mA Functional testing See 4.4.1b 7, 8 Propagation delay time, 3/ 9 2.2 7 tPLH4/ 10, 11 2.2 8.5 3/ 9 1.2 5 D to Q tPHL4

39、/ 10, 11 1.2 7 3/ 9 4.2 11.5 tPLH4/ 10, 11 4.2 15 3/ 9 2.2 7 Propagation delay time, LE to Q tPHL4/ 10, 11 2.2 8.5 3/ 9 1.2 11 tPZH4/ 10, 11 1.2 13.5 3/ 9 1.2 7.5 Propagation delay time, OE to Q tPZL4/ 10, 11 1.2 10 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or ne

40、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TA +125C un

41、less otherwise specified Group A subgroups Limits Unit 3/ 9 1.2 6.5 ns tPHZ4/ 10, 11 1.2 10 3/ 9 1.2 6 Propagation delay time, OE to Q tPLZ4/ 10, 11 1.2 7 Pulse duration, LE high tw6 Setup time, data before LE low tsu2 Hold time, data after LE low thVCC= 4.5 to 5.5 V See figure 4 and 5 as applicable

42、 9, 10, 11 3 1/ Not more than one output should be shorted at a time and the duration of the short circuit condition should not exceed 1 second. 2/ ICCZis measured with OE at 4.5 V and all other inputs grounded. 3/ VCC= 5.0 V, CL= 50 pF, RL= 500 , TA= 25C, see figure 4 and 5 as applicable. 4/ VCC= 4

43、.5 V to 5.5 V, CL= 50 pF, RL= 500 , TA= min to max, see figure 4 and 5 as applicable. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LE

44、VEL A SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outlines R, S, 2 Terminal number Terminal symbol 1 OE 2 1Q 3 1D 4 2D 5 2Q 6 3Q 7 3D 8 4D 9 4Q 10 GND 11 LE 12 5Q 13 5D 14 6D 15 6Q 16 7Q 17 7D 18 8D 19 8Q 20 VCCFIGURE 1. Terminal connections. INPUTS OE LE D OUTPUT Q L H H H L H L L L L X Q0H X

45、 X Z FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic symbol

46、 and logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 9 DSCC FORM 2234 APR 97 See notes on next page. FIGURE

47、 4. Test circuit and timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-97589 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 10 DSCC FORM 2234 APR 97 NOTES: 1.

48、CLincludes probe and jig capacitance. 2. All input pulses have the following characteristics; PRR = 1 MHz, tr= tf 2.5 ns, duty cycle = 50%. 3. When measuring propagation delay times of three-state outputs, switch S1 is open. 4. The outputs are measured one at a time with one transition per measurement. 5. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for a