DLA SMD-5962-97574 REV D-2010 MICROCIRCUIT DIGITAL LOW VOLTAGE CMOS OCTAL EDGE-TRIGGERED D-TYPE FLIP FLOP WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make corrections to notes in figure 5. - JAK 00-08-02 Monica L. Poelking B Correct group A, subgroups for AC tests in table I. Correct trand tfin note 7, figure 5. Update the boilerplate to the requirements of MIL-PRF-38535. Editorial changes thr

2、oughout. - TVN 03-04-08 Thomas M. Hess C Add footnote to ICCin table I. Add table III, delta limits. Editorial changes throughout. - TVN 03-07-14 Thomas M. Hess D Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - jak 10-09-08 Thomas M. Hess REV SHEET REV SHEET REV D D D D SH

3、EET 15 16 17 18 REV STATUS OF SHEETS REV D D D D D D D D D D D D D D SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary L. Gross DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND

4、 AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Charles F. Saffle, Jr. APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, LOW VOLTAGE CMOS, OCTAL EDGE-TRIGGERED D-TYPE FLIP FLOP WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 97-07-30 REVISION LEVEL D SIZE A CAGE COD

5、E 67268 5962-97574 SHEET 1 OF 18 DSCC FORM 2233 APR 97 5962-E422-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-97574 REVISION LEVEL D SHEET 2 DSCC FORM 223

6、4 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN).

7、When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 97574 01 Q R A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designat

8、or (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA

9、 levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54LVC374A Octal edge-triggered D-type flip flop with three-state output

10、s 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accorda

11、nce with MIL-PRF-38535, appendix A. Q or V Certification and qualification to MIL-PRF-38535. 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20

12、 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license

13、from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-97574 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +6.5 V dc DC input voltage range (VIN) -0.5 V dc to +6.5 V dc 4/

14、DC output voltage range (VOUT): High or low state -0.5 V dc to VCC+ 0.5 V dc 4/ 5/ High-impedance or power-off state -0.5 V dc to 6.5 V dc 4/ DC input clamp current (IIK) (VIN 0.0 V) . -50 mA DC output clamp current (IOK) (VOUT 0.0 V or VOUT VCC) . 50 mA Continuous output current (IOUT) (VOUT= 0.0 t

15、o VCC) 50 mA Continuous current through VCCor GND . 100 mA Maximum power dissipation at TA= +55C (in still air) . 500 mW 6/ Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperatur

16、e (TJ) +175C 1.4 Recommended operating conditions. 2/ 3/ 7/ Supply voltage range (VCC): Operating . +2.0 V dc to +3.6 V dc Data retention only (minimum) . +1.5 V dc Input voltage range (VIN) 0.0 V to +5.5 V dc Output voltage range (VOUT): High or low state 0.0 V to VCCThree-state 0.0 V to +5.5 V dc

17、Minimum high level input voltage (VIH) (VCC= 2.7 V to 3.6 V) +2.0 V dc Maximum low level input voltage (VIL) (VCC= 2.7 V to 3.6 V) . +0.8 V dc Maximum high level output current (IOH): VCC= 2.7 V -12 mA VCC= 3.0 V -24 mA Maximum low level output current (IOL): VCC= 2.7 V +12 mA VCC= 3.0 V +24 mA Inpu

18、t transition rise or fall rate (t/v) 0 ns/V to 10 ns/V Case operating temperature range (TC) . -55C to +125C 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless othe

19、rwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ The input and output negative voltage ratings may be exceeded provided that the input and output clamp curre

20、nt ratings are observed. 5/ The value of VCCis provided in the recommended operating conditions section 1.4 above. 6/ The maximum package power dissipation is calculated using a junction temperature of 150C and a board trace length of 750 mils. 7/ Unused inputs must be held high or low to prevent th

21、em from floating. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-97574 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government sp

22、ecification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-

23、PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcirc

24、uit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the even

25、t of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individ

26、ual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual

27、item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein

28、 for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be

29、 as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Ground bounce load circuit and waveforms. The ground bounce load circuit and waveforms shall be as specified on figure 4. 3.2.6 Switching waveforms and test circuit. The switching waveforms and

30、 test circuit shall be as specified on figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the fu

31、ll case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-97574 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 3.4 Electrical test re

32、quirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where

33、 marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PR

34、F-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in

35、 MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall b

36、e required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product

37、meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M

38、in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see 6.2 herein) involving devices acquired to this drawing is re

39、quired for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore

40、 documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 38 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction o

41、r networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-97574 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditio

42、ns 2/ -55C TC +125C +2.0 V VCC +3.6 V unless otherwise specified VCCGroup A subgroups Limits 3/ Unit Min Max High level output voltage 3006 VOHFor all inputs affecting output under test, VIN= VIHor VILFor all other inputs, VIN= VCCor GND IOH= -100 A 2.7 V and 3.6 V 1, 2, 3 VCC-0.2 V IOH= -12 mA 2.7

43、V 1, 2, 3 2.2 3.0 V 2.4 IOH= -24 mA 3.0 V 1, 2, 3 2.2 Low level output voltage 3007 VOLFor all inputs affecting output under test, VIN= VIHor VILFor All other inputs, VIN= VCCor GND IOL= 100 A 2.7 V and 3.6 V 1, 2, 3 0.2 V IOL= 12 mA 2.7 V 1, 2, 3 0.4 IOL= 24 mA 3.0 V 1, 2, 3 0.55 Input current high

44、 3010 IIHFor input under test, VIN= 5.5 V For all other inputs, VIN= VCCor GND 3.6 V 1, 2, 3 +5.0 A Input current low 3009 IILFor input under test, VIN= 0.0 V For all other inputs, VIN= VCCor GND 3.6 V 1, 2, 3 -5.0 A Three-state output leakage current high 3021 IOZH VOUT= 5.5 V 3.6 V 1, 2, 3 +15.0 A

45、 Three-state output leakage current low 3020 IOZL VOUT= 0.0 V 3.6 V 1, 2, 3 -15.0 A Quiescent supply current 3005 ICCFor all inputs, VIN= VCCor GND IOUT= 0.0 A 3.6 V 1, 2, 3 15.0 A For all inputs, 3.6 V VIN 5.5 V IOUT= 0.0 A 4/ 15.0 Quiescent supply current delta, TTL input levels 3005 ICC5/ For inp

46、ut under test, VIN= VCC- 0.6 V Other inputs at VCCor GND 2.7 V and 3.6 V 1, 2, 3 500.0 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE

47、 A 5962-97574 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC +125C +2.0 V VCC +3.6 V unless otherwise specified VCCGroup A subgroups Limits 3/ Unit Min Max Input capacit

48、ance 3012 CINTC= +25C VIN= VCCor GND See 4.4.1c 3.3 V 4 12.0 pF Output capacitance 3012 COUTTC= +25C VIN= VCCor GND See 4.4.1c 3.3 V 4 12.0 pF Power dissipation capacitance per flip flop CPDCL= 50 pF minimum f = 10 MHz TC= +25C See 4.4.1c Outputs enabled 3.0 V and 3.6 V 4 58.0 pF Low level ground bounce noise VOLP6/ VIH= 2.7 V, VIL= 0.0 V TA= +25C See 4.4.1d See figure 4 3.0 V 4 1200 mV VOLV6/ 3.0 V 4 -1000 mV High level VCCbounce noise VOHP6/ 3.0 V 4 1000 mV VOHV6/ 3.0 V 4 -1000 mV Fun