DLA SMD-5962-96773 REV D-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf

《DLA SMD-5962-96773 REV D-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-96773 REV D-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS MONOLITHIC SILICON.pdf（20页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add vendor CAGE 27014. Add case outline Z. Update boilerplate to MIL-PRF-38535 requirements. jak 01-08-27 Thomas M. Hess B Add vendor CAGE F8859. Add case outline X. Add device type 02. Add table III, delta limits. Editorial changes throughout. j

2、ak 03-04-17 Thomas M. Hess C Add section 1.5, radiation features. Update boilerplate to MIL-PRF-38535 requirements and to include radiation hardness assured requirements. Editorial changes throughout. LTG 05-05-10 Thomas M. Hess D Update dimensions of case outline X to figure 1. - LTG 12-08-23 Thoma

3、s M. Hess REV SHEET REV D D D D SHEET 15 16 17 18 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerby DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAW

4、ING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH THREE-STATE OUTPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-0

5、2-23 REVISION LEVEL D SIZE A CAGE CODE 67268 5962-96773 SHEET 1 OF 18 DSCC FORM 2233 APR 97 5962-E417-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96773 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 R

6、EVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part

7、or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 F 96773 02 V X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class desi

8、gnator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device t

9、ype(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54AC574 Octal edge-triggered D-type flip-flop with three-state outputs 02 54AC574 Octal edge-triggered D-type flip-flop with three-state outputs 1.2.3 Device class designator. The devi

10、ce class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline lette

11、r Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat pack 2 CQCC1-N20 20 Square leadless chip carrier Z GDFP1-G20 20 Flat pack with gullwing X See figure 1 20 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF

12、-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96773 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum rat

13、ings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc 4/ DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc 4/ DC input clamp current (IIK) (VINVCC) . 20 mA DC output clamp current (IOK) (VOUTVCC) 20 mA Continuous output cu

14、rrent (IO) (VOUT= 0.0 V to VCC) 50 mA Continuous current through VCCor GND . 200 mA Maximum power dissipation (PD) . 500 mW Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 10 seconds): Case outline X +260C All other case outlines except case X . +300C Thermal resistance

15、, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VOUT). +0.0 V dc to VCCMinimum high level input voltage (VIH): VCC=

16、 3.0 V +2.1 V VCC= 4.5 V +3.15 V VCC= 5.5 V +3.85 V Maximum low level input voltage (VIL): VCC= 3.0 V +0.9 V VCC= 4.5 V +1.35 V VCC= 5.5 V +1.65 V Maximum high level output current (IOH): VCC= 3.0 V -12 mA VCC= 4.5 V -24 mA VCC= 5.5 V -24 mA Maximum low level output current (IOL): VCC= 3.0 V +12 mA

17、VCC= 4.5 V +24 mA VCC= 5.5 V +24 mA Input rise or fall time rate (t/V) . 0 to 8 ns/V Case operating temperature range (TC) . -55C to +125C 1.5 Radiation features. Device type 02: Maximum total dose available (dose rate = 50 300 rads (Si)/s) 300 krads (Si) 5/ No Single Event Latchup (SEL) occurs at L

18、ET (see 4.4.4.2) . 93 MeV-cm2/mg 5/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the pa

19、rameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. Unused inputs must be held high or low. 4/ The input negative voltage rating may be exceeded provided that the input clamp current rating is observed. 5/ Limits obtained during technol

20、ogy characterization/qualification, guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE

21、 A 5962-96773 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herei

22、n. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcir

23、cuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or

24、from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents cited in the

25、solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC Standard No. 20 - Standard for Description of 54/74ACXXXXX and 54/74ACTXXXXX Advanced High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology

26、Association, 3103 North 10thStreet, Suite 240-S Arlington, VA 22201). ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Copies of this document is available online at http:/www.astm.or

27、g/ or from ASTM International, P. O. Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959). (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents may also be available in or through librar

28、ies or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemp

29、tion has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not

30、 affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permit

31、ted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96773 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 and figure 1 herein. 3.2.2 Terminal connections. Th

32、e terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 4. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as s

33、pecified on figure 5. 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postir

34、radiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requiremen

35、ts shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is

36、 not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance

37、mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this d

38、rawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificat

39、e of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT D

40、RAWING SIZE A 5962-96773 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ 3/ -55C TC +125C +3.0 V VCC +5.5 V unless otherwise specified Device

41、 type and device class VCCGroup A subgroups Limits 4/ Unit Min Max Positive input clamp voltage 3022 VIC+For input under test, IIN= 1 mA All V GND 1 0.4 1.5 V Negative input clamp voltage 3022 VIC-For input under test, IIN= -1 mA All V OPEN 1 -0.4 -1.5 V High level output voltage 3006 VOH1 For all i

42、nputs affecting output under test VIN= VILor VIHFor all other inputs VIN= VCCor GND IOH= -50 A All All 3.0 V 1, 2, 3 2.9 V 4.5 V 4.4 5.5 V 5.4 VOH2 IOH= -12 mA 3.0 V 1 2.56 2, 3 2.4 VOH3 IOH= -24 mA 4.5 V 1 3.94 2, 3 3.7 5.5 V 1 4.94 2, 3 4.7 VOH4 IOH= -50 mA 02 All 5.5 V 1, 2, 3 3.85 Low level outp

43、ut voltage 3007 VOL1 For all inputs affecting output under test VIN= VILor VIH For all other inputs VIN= VCCor GND IOL= 50 A All All 3.0 V 1, 2, 3 0.1 V 4.5 V 0.1 5.5 V 0.1 VOL2 IOL= 12 mA 3.0 V 1 0.36 2, 3 0.5 VOL3 IOL= 24 mA 4.5 V 1 0.36 2, 3 0.5 5.5 V 1 0.36 2, 3 0.5 VOL4 IOL= 50 mA 02 All 5.5 V

44、1, 2, 3 1.65 Input current high 3010 IIHFor input under test, VIN= VCC For all other inputs, VIN= VCCor GND All All 5.5 V 1 +0.1 A 2, 3 +1.0 Input current low 3009 IILFor input under test, VIN= GND For all other inputs, VIN= VCCor GND All All 5.5 V 1 -0.1 A 2, 3 -1.0 Three-state output leakage curre

45、nt, high 3021 IOZHOE = VIH For all other inputs, VIN= VCCor GND All All 5.5 V 1 0.5 A 2, 3 5.0 VOUT= VCCM, D, P, L, R, F 02 Q, V 5.5 V 1 5.0 Three-state output leakage current, low 3020 IOZLOE = VIHFor all other inputs, VIN= VCCor GND All All 5.5 V 1 -0.5 A 2, 3 -5.0 VOUT= GND M, D, P, L, R, F 02 Q,

46、 V 5.5 V 1 -5.0 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96773 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE IA. El

47、ectrical performance characteristics Continued. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ 3/ -55C TC +125C +3.0 V VCC +5.5 V unless otherwise specified Device type and device class VCCGroup A subgroups Limits 4/ Unit Min Max Quiescent supply current, output high 3005 ICCHVIN= VCC

48、or GND IOUT= 0.0 A All All 5.5 V 1 4.0 A 2, 3 80.0 M, D, P, L, R, F 5/ 02 Q, V 1 50 Quiescent supply current, output low 3005 ICCLVIN= VCCor GND IOUT= 0.0 A All All 5.5 V 1 4.0 A 2, 3 80.0 M, D, P, L, R, F 5/ 02 Q, V 1 50 Quiescent supply current, output three-state 3005 ICCZVIN= VCCor GND IOUT= 0.0 A All All 5.5 V 1 4.0 A 2, 3 80.0 M, D, P, L, R, F 5/ 02 Q, V 1 50 Power dissipation capacitance CPD6/ TC= +25C See 4.4.1c All All 5.0 V 4 30 pF Input capacitance 3012 CINTC= +25C, VIN= VCCor GND See 4.4.1c All All 5.0 V 4 9.0 pF Functional tests 3014 7/ For all inputs