DLA SMD-5962-96766 REV B-2013 MICROCIRCUIT MEMORY DIGITAL RADIATION-HARDENED CMOS 256 X 8 STATIC RAM MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R153-96. - glg 96-06-27 Michael A. Frye B Update drawing to meet current MIL-PRF-38535 requirements. glg. 13-05-01 Charles F. Saffle REV SHEET REV B B B B B B SHEET 15 16 17 18 19 20 REV STATUS REV B B B B B B
2、B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary L. Gross DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL APPROVED BY Michael A.
3、Frye MICROCIRCUIT, MEMORY, DIGITAL, RADIATION-HARDENED, CMOS, 256 X 8 STATIC RAM, MONOLITHIC SILICON DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-04-16 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-96766 SHEET 1 OF 20 DSCC FORM 2233 APR 97 5962-E403-13 Provi
4、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96766 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance
5、 class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflecte
6、d in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 96766 01 V X C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. D
7、evice classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit fun
8、ction Access time 01 81C55RH 256 X 8 Radiation hardened CMOS SRAM with CE 500 ns 02 81C56RH 256 X 8 Radiation hardened CMOS SRAM with CE 500 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requir
9、ements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CDIP2-T40 40 Dual-in-line package Y See figure 1 42 Flat pack 1.2.
10、5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. 1.3 Absolute maximum ratings. 2/ Supply voltage range . +7.0 V dc Input, output, or I/O voltage . -0.3 V dc to VDD+0.3 V dc Maximum package power dissipation (PD) at TA= +125C Case V 1.25 W 3/ Case X 1.11 W 3
11、/ Lead temperature (soldering, 10 seconds maximum) +300C Thermal resistance, junction-to-case (JC): Case V 5.0C/W Case X 5.0C/W Thermal resistance, junction-to-ambient (JA): Case V 40.0C/W Case X 45.0C/W Junction temperature (TJ) +175C Storage temperature range -65C to +150C Provided by IHSNot for R
12、esaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96766 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage (VDD) +4.75 V dc to +5.25 V dc
13、 Ground voltage (GND) . 0.0 V dc Input high voltage (VIH) VDD-0.5 V to VDDInput Low voltage (VIL) . 0.0 V dc to 0.8 VDDCase operating temperature range (TC) . -55C to +125C 1.5 Radiation features. Radiation features: Total dose irradiation . 100 KRads(Si) Dose rate upset 1 x 108Rads(Si)/sec 4/ Singl
14、e event phenomenon (SEP) effective threshold (LET) with no upsets 4/ Latchup. 1 x 1012Rads(Si)/sec 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless
15、otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL
16、-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil or from the Standardiz
17、ation Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitat
18、ion. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Ba
19、rr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in QML-38535 and MIL-HDBK-103 (see 6.6 herein). 2/ Stresses above the absolute maxim
20、um rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is based on JA)at the following rate: case out
21、line X - - - 25.0 mW/C, case outline Y - - - 22.2 mW/C. 4/ Guaranteed by process or design, but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96766 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-399
22、0 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 JEDEC INTERNATIONAL (JEDEC) JESD 78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publi
23、cations are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cite
24、d herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance
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