DLA SMD-5962-96762 REV B-2004 MICROCIRCUIT DIGITAL-LINEAR SIGNAL CONDITIONING A D CONVERTER MONOLITHIC SILICON《信号调节交流电或直流电转换器硅单片电路数字线型微电路》.pdf

《DLA SMD-5962-96762 REV B-2004 MICROCIRCUIT DIGITAL-LINEAR SIGNAL CONDITIONING A D CONVERTER MONOLITHIC SILICON《信号调节交流电或直流电转换器硅单片电路数字线型微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-96762 REV B-2004 MICROCIRCUIT DIGITAL-LINEAR SIGNAL CONDITIONING A D CONVERTER MONOLITHIC SILICON《信号调节交流电或直流电转换器硅单片电路数字线型微电路》.pdf（17页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes to table I, common-mode rejection test. drw 99-09-23 Raymond Monnin B Drawing updated to reflect current requirements. -rrp 04-10-13 Raymond Monnin REV SHET REV B B SHET 15 16 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2

2、 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Dan Wonnell DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Raymond Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Raymond Monnin MICROCIRCUIT, DIGITAL

3、-LINEAR, SIGNAL CONDITIONING A/D CONVERTER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 98-08-12 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-96762 SHEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E004-05 Provided by IHSNot for ResaleNo reproduction or network

4、ing permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96762 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliabil

5、ity (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN i

6、s as shown in the following example: 5962 - 96762 01 Q L X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked d

7、evices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device typ

8、e(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 AD7710 Signal conditioning A/D converter 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class De

9、vice requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as design

10、ated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 16 Flatpack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot f

11、or ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96762 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ AVDDto DVDD-0.3 V dc to +12 V dc AVDD

12、to VSS. -0.3 V dc to +12 V dc AVDDto AGND -0.3 V dc to +12 V dc AVDDto DGND -0.3 V dc to +12 V dc DVDDto AGND -0.3 V dc to +6 V dc DVDDto DGND -0.3 V dc to +6 V dc VSSto AGND . +0.3 V dc to -6 V dc VSSto DGND. +0.3 V dc to -6 V dc Analog input voltage to AGND VSS- 0.3 V dc to AVDD+ 0.3 V dc Referenc

13、e input voltage to AGND . VSS- 0.3 V dc to AVDD+ 0.3 V dc REF OUT to AGND. -0.3 V dc to AVDDDigital input voltage to DGND . -0.3 V dc to AVDD+ 0.3 V dc Digital output voltage to DGND . -0.3 V dc to DVDD+ 0.3 V dc Storage temperature range . -65C to +150C Lead temperature (soldering, 10 secs) +265C P

14、ower dissipation to +75C (PD) . 450 mW 2/ 1.4 Recommended operating conditions. Ambient operating temperature range -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the e

15、xtent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Met

16、hod Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps

17、.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing

18、takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance an

19、d affect reliability. 2/ Derate linearly above +75C at 6 mW/C above +25C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96762 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET

20、4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall

21、not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction,

22、 and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall

23、be as specified on figure 1. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating

24、 temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers

25、PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes

26、Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for de

27、vice class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device cl

28、ass M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that th

29、e manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-3853

30、5 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing

31、 is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made

32、available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 81 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted withou

33、t license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96762 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Gr

34、oup A subgroups Device type Min Max Unit For filter notch 60 Hz 24 For filter notch = 100 Hz 22 For filter notch = 250 Hz 18 For filter notch = 500 Hz 15 No missing codes 2/ For filter notch = 1 Khz 1, 2, 3 01 12 Bits Integral nonlinearity INL For filter notch 60 Hz 1, 2, 3 01 -0.0015 %FSR Bipolar n

35、egative full-scale error BPFSE Excluding reference 3/ 1, 2, 3 01 -0.003 +0.003 %FSR Analog Input Common-mode rejection CMR At DC, MCLKIN = 8 Mhz, AVDD= +10.5 V, REF IN(+) = +1.25 V 1, 2, 3 01 90 dB Common-mode voltage range CMV 4/, 5/ 1, 2, 3 01 VSSAVDDV For filter notches of 10, 25, 50 Hz, 0.02 x f

36、NOTCH100 Normal - mode rejection 2/ NMR For filter notches of 10, 30, 60 Hz, 0.02 x fNOTCH1, 2, 3 01 100 dB DC input leakage current IIL2/ 1, 2, 3 01 1 nA Sampling capacitance CS2/ 4 01 20 pF Analog input voltage range 6/, 7/ VINBipolar input range (B/U bit of control register = 0) 1, 2, 3 01 VREFV

37、Reference input voltage VREFINREF IN(+) - REF IN(-) 8/ 1, 2, 3 01 2.5 5 V Reference output voltage VREFO1, 2, 3 01 2.475 2.525 V Line regulation (AVDD) AVDD= +5 V 0.25 V 1, 2, 3 01 1 mV/V Load regulation Max load current 1 mA 1, 2, 3 01 1.5 mV/ mA Input low voltage VINLAll inputs 5/ 7, 8 01 0.8 V Al

38、l inputs except MCLK IN 2.0 Input high voltage 5/ VINHMCLK IN only 7, 8 01 3.5 V See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96762 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, O

39、HIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Min Max Unit Input current IIN1, 2, 3 01 -10 +10 A Output low voltage VOL

40、ISINK= 1.6 mA 5/ 7, 8 01 0.4 V Output high voltage VOHISOURCE= 100 A 5/ 7, 8 01 DVDD -1V Floating state leakage current IFL7, 8 01 -10 +10 A Transducer burn-out current IBO1, 2, 3 01 3 6 A Compensation output current ICO1, 2, 3 01 16 24 A Compensation current line regulation (AVDD) ILINEAVDD= +5 V 0

41、.25 V 1, 2, 3 01 20 nA/V Compensation current load regulation ILOAD1, 2, 3 01 20 nA/V Output compliance VOC2/ 1, 2, 3 01 AVDD-2 V Positive full-scale calibration (1.05 X VREF) GAIN V Negative full-scale calibration FSC 9/ 1, 2, 3 01 -(1.05 X VREF) GAIN V Offset calibration limits OC 10/ 1, 2, 3 01 -

42、(1.05 X VREF) GAIN V Input span IS 10/ GAIN is the selected PGA gain (between 1 and 128) 1, 2, 3 01 (0.8 X VREF) GAIN (2.1 X VREF) GAIN V AVDDcurrent IAVDD1, 2, 3 01 4 mA DVDDcurrent IDVDD1, 2, 3 01 4.5 mA VSScurrent IVSSVSS= -5.25 V 1, 2, 3 01 1.5 mA See footnotes at end of table. Provided by IHSNo

43、t for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96762 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits

44、 Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Min Max Unit Master clock frequency fCLKIN11/, 12/ Crystal oscillator or externally supplied for specified performance 9 01 10 MHz SYNC pulse width t15/ 9 01 1000 ns DRDY to RFS setup time t22/, 5/ 9 01

45、 0 ns DRDY to RFS hold time t35/ 9, 10, 11 01 0 ns A0 to RFS setup time t42/, 5/ 9 01 2 X tCLKINns RFS low to SCLK falling edge t62/, 5/ 9, 10, 11 01 4 X tCLKIN+ 20 ns Data access time ( RFS low to data valid) t72/, 5/, 13/ 9, 10, 11 01 4 X tCLKIN +20ns A0 to TFS setup time t142/, 5/ 9 01 50 ns A0 t

46、o TFS hold time t152/, 5/ 9 01 0 ns TFS to SCLK falling edge delay time t162/, 5/ 9, 10, 11 01 4 X tCLKIN+20 ns TFS to SCLK falling edge hold time t175/ 9 01 4 X tCLKINns Data valid to SCLK setup t185/ 9 01 0 ns Serial clock input frequency fSCLK5/ 9 01 fCLKIN/5MHz DRDY to RFS setup time t205/ 9 01

47、0 ns A0 to RFS setup time t222/, 5/ 9, 10, 11 01 2 X tCLKINns A0 to RFS hold time t232/, 5/ 9, 10, 11 01 0 ns Data access time ( RFS low to data valid) t242/, 5/, 13/ 9, 10, 11 01 4 X tCLKINns SCLK low pulse width t265/ 9 01 2 X tCLKINns See footnotes at end of table. Provided by IHSNot for ResaleNo

48、 reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96762 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Min Max Unit SCLK high pulse width t275/ 9 01 2 X tCLKINns RFS to data valid hold time t312/, 5/, 14/ 9, 10, 11 01 5 X tCLKIN/2