DLA SMD-5962-96760-1996 MICROCIRCUIT LINEAR DUAL JFET INPUT OPERATIONAL AMPLIFIER MONOLITHIC SILICON《双路输入运算放大器硅单片电路线型微电路》.pdf
《DLA SMD-5962-96760-1996 MICROCIRCUIT LINEAR DUAL JFET INPUT OPERATIONAL AMPLIFIER MONOLITHIC SILICON《双路输入运算放大器硅单片电路线型微电路》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-96760-1996 MICROCIRCUIT LINEAR DUAL JFET INPUT OPERATIONAL AMPLIFIER MONOLITHIC SILICON《双路输入运算放大器硅单片电路线型微电路》.pdf(10页珍藏版)》请在麦多课文档分享上搜索。
1、LTR PREPAREDBY RICK OFFICER DESCRIPTION DATE CVRmoaA) APPROVED CHECKED BY WESH PITHADIA APPROVED BY MICHAEL FRYE DRAWING APPROVAL DATE 96-02-01 REVISION LEVEL 4 DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 MICROCIRCUIT, LINEAR, DUAL JFET INPUT OPERATIONAL AMPLIFIER, MONOLITHIC SILICON I 5962
2、-96760 SIZE I CAF7YD distribution is unlimited. 5962-E294-96 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1. SCWE 1.1 SEPpT. This drawing docunents two product assurance class levels consisting of high reliability (device classes Q and M) and spac
3、e application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Nutr (PIN). Uhen available, a choice of Raiatian Hardness Assurance (RHA) levels are reflected in the PIN. lhe PIN is as shown in the following exanple: 1.2 W. Feder
4、al RHA LfLL Device Device Case Lead II I 9676e stock class designetor type class outline finish designator (see 1.2.1) V Drawing nuiiber . are marked with the appropriate RHA designator. specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RIU device. (
5、sa 1.2.2) desi gnator (see 1.2.4) (sa 1.2.5) LU (see 1.2.3) 1.2.1 Device classes Q and V RHA marked devices met the MIL-PRF-38535 specified RHA levels and Device class M RHA marked devices meet the MIL-PRF-38535, appendix A 1.2.2 etvice . The device type(s) identify the circuit fvrcGion as follows:
6、-cuit fuKLbl SIZE A STANDARD MICROCIRCUIT DRAWING DEFENSEELECTRONICSSUPPLYCENTER DAYTON, OHIO 45444 o1 5962-96760 REVISION LEVEL SHEET 2 LF412 Lon offset, low drift -1, JFET input operational enplifier 1.2.3 Device c- . The device class designator is a single letter identifying the product assurance
7、 level as follows: Device ccasS NiCe r- M Vendor self-certification to the requirements for MIL-STD-883 canpliant, non-JAN class level E microcircuits in accordance with MIL-PRF-38535, appmdix A a or v Certification and qualification to MIL-PRF-38535 1.2.4 Case outtinets) . The case outline(s) are a
8、s designated in MIL-STD-1835 and as follows: BLlline letter - G P mcyi -xa GDIP1-TB or CDIP2-Ta a a Can Dual - in- 1 ine 1.2.5 f inish. The lead finish is as specified in MIL-PRF-38535for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduc
9、tion or networking permitted without license from IHS-,-,-I 1.3 Absolute -U Supply voltage (*VS) . 118 V Differential input voltage i30 V U Input voltage range 115 V Output short circuit duration . Continuous 3 Pouer dissipation (PD): Case C .670InU CaseP . 670W hall be in accordance with MIL-PRF-38
10、535. ierein for groups A, 6, C, D, and E inspections (see 4.4.1 through 4.4.4). IIL-PRF-38535 including groups A, 6, C, D, and E inspections and as specified herein except where option 2 of IlL-PRF-38535 permits alternate in-line control testing. auality conformance inspection for device class M sha
11、ll be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be perfod for device class M ;hall be those specified in method 5005 of MIL-STD-883 and herein for groups A, 6, C, 0, and E inspections (see 4.4.1 ehrough 4.4.4). The burn-in test circuit The test circuit shal
12、l specify the inputs, outputs, biases, and power dissipation, as b. c. . Qualification inspection for device classes 4 and V 4.3 Qrolp E end-point electrical 1 parameters (see 4.4) Subgror48 (in accordonce with MIL-PRF-38535, table 111) I Device I class V Device class Q I - I 1 I - I U PDA applies t
13、o subgroup 1. . 4.4.2.1 a Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition A, 8, C, or D. The test circuit shall be maintained by the manufacturer vidcr docunent revision level control and shall be mede available to the preparing or acquiring activity upon request. te
14、st circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-3. The b. TA = +125*C, minim. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criter
15、ia for drvice cl-s P a . lhe steady-state life test duration, test condition and test tenpcrature, or approved alternatives shall be as specified in the device manufacturers W plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under docunnt revision level control by the devi
16、ce manufacturers TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity rgon requcst. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-
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- DLASMD5962967601996MICROCIRCUITLINEARDUALJFETINPUTOPERATIONALAMPLIFIERMONOLITHICSILICON 输入 运算放大器 单片 电路

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