DLA SMD-5962-96595 REV H-2013 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS NONINVERTING OCTAL BUFFER LINE DRIVER WITH THREESTATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC S.pdf

《DLA SMD-5962-96595 REV H-2013 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS NONINVERTING OCTAL BUFFER LINE DRIVER WITH THREESTATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC S.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-96595 REV H-2013 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS NONINVERTING OCTAL BUFFER LINE DRIVER WITH THREESTATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC S.pdf（19页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R091-97 96-11-20 Monica L. Poelking B Add footnote to dose rate upset and dose rate survivability in section 1.5. Add test circuit and make changes to voltage level in figure 4. Incorporate revision A into docu

2、ment. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. LTG 03-11-20 Thomas M. Hess C Add device types 02 and 03. Delete RHA level “H” for device type 01. Editorial changes throughout. - LTG 04-08-02 Thomas M. Hess D Correct radiation features for device type 02 in sect

3、ion 1.5 and add footnote 8/. Correct footnotes 2/ and 8/ in Table IA. Correct SEP test limit in the table IB. Correct paragraph 4.4.4.1. Update boilerplate paragraphs to current requirements of MIL-PRF-38535. - MAA 09-09-09 Thomas M. Hess E Make corrections to table IA, output voltage tests VOHand V

4、OL, change condition VIN- jak 11-02-02 David J. Corbett F Add footnote 8 to figure 4. Add equivalent test circuit to figure 4. - jak 12-07-24 Thomas M. Hess G To correct switching wave forms input/output test limits to figure 4. Add test equivalent circuits and footnote 5 to figure 4. Add paragraph

5、2.2 for ASTM F1192 document. Delete class M requirements throughout.MAA 13-02-19 Thomas M. Hess H Add footnote 4/ for capacitance limit for measurements of propagation delay time to table IA. MAA 13-09-12 Thomas M. Hess REV SHEET REV H H H SHEET 15 16 17 REV STATUS REV H H H H H H H H H H H H H H OF

6、 SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Po

7、elking MICROCIRCUIT, DIGITAL, RADIATION HARDENED, ADVANCED CMOS, NONINVERTING OCTAL BUFFER/LINE DRIVER WITH THREE- STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-05-13 AMSC N/A REVISION LEVEL H SIZE A CAGE CODE 67268 5962-9

8、6595 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E531-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96595 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SC

9、OPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choi

10、ce of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 96595 01 V X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.

11、2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit fun

12、ction as follows: Device type Generic number Circuit function 01 54ACTS541 Radiation hardened, non-inverting octal buffer/line driver with three-state outputs, TTL compatible inputs 02 54ACTS541E Enhanced radiation hardened, non-inverting octal buffer/line driver with three-state outputs, TTL compat

13、ible inputs 03 54ACTS541E Enhanced radiation hardened, non-inverting octal buffer/line driver with three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirem

14、ents documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line X CDFP4-F20 20 Flat pack 1.2.

15、5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96595 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL

16、 H SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity

17、 current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds) +300C Case outline R and X (device type 01). See MIL-STD-1835 Case outline X (device types 02 and 03) . 15C/W Junction temperature (TJ) +175C Maximum package power dissipation (PD): Device

18、type 01 . 1.0 W Device types 02 and 03 . 3.2 W 4/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD): Device type 01 . +4.5 V dc to +5.5 V dc Device types 02 and 03 . +3.0 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VDDCas

19、e operating temperature range (TC) . -55C to +125C Maximum input rise or fall time rate at VDD= 4.5 V (tr, tf) . 1 ns/V 5/ 1.5 Radiation features. 6/ Maximum total dose available: Device type 01 (dose rate = 50 300 rads (Si)/s) 5 x 105Rad (Si) 7/ Device type 02 (effective dose rate = 1rad (Si)/s) 1

20、x 106Rad (Si) 8/ Device type 03 (dose rate = 50 300 rads (Si)/s) 5 x 105Rads (Si) 7/ Single event phenomenon (SEP): Device type 01: no SEU occurs at effective LET (see 4.4.4.4) . 80 MeV/(mg/cm2) 9/ no SEL occurs at effective LET (see 4.4.4.4) 120 MeV/(mg/cm2) 9/ Device types 02 and 03: no SEU occurs

21、 at effective LET (see 4.4.4.4) . 108 MeV/(mg/cm2) 9/ no SEL occurs at effective LET (see 4.4.4.4) . 120 MeV/(mg/cm2) 9/ Dose rate upset (20 ns pulse) (device types 01, 02 and 03) . 1 x 109Rads (Si)/s 9/ 10/ Dose rate induced latch-up . None 9/ Dose rate survivability (device types 01, 02 and 03) .

22、1 x 1012Rads (Si)/s 9/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters

23、specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise specified. 4/ Per MIL-STD-883 method 1012.1 section 3.4.1, PD(Package) = (TJ(max) - TC(max) . JC5/ Derate system propagation delays by difference in rise time to switch point fo

24、r tfor tf 1ns/V. 6/ Radiation testing is performed on the standard evaluation circuit. 7/ Device types 01 and 03 are tested in accordance with MIL-STD-883, method 1019, condition A. 8/ Device type 02 is irradiated at dose rate = 50 - 300 rads (Si)/s in accordance with MIL-STD-883, method 1019, condi

25、tion A, and is guaranteed to a maximum total dose specified. The effective dose rate after extended room temperature anneal = 1 rad (Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for this device only applies to the specified effective dose rate, or low

26、er, environment. 9/ Limits are guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. 10/ This limit is applicable for device types 01, 02, 03 with VDD 4.5 V. Device types 02 and 03 do not meet this limit at VDD 4.5 V. Prov

27、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96595 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards

28、, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated

29、 Circuits Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-

30、780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part o

31、f this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of sem

32、iconductor Devices. (Copies of these documents are available online at http:/www.astm.org or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA, 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cite

33、d herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance

34、with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physic

35、al dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shal

36、l be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted with

37、out license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96595 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 5 DSCC FORM 2234 APR 97 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision lev

38、el control and shall be made available to the preparing and acquiring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as spec

39、ified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table IA. 3.5 Marking. The part shall be marked wi

40、th the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the R

41、HA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device cl

42、asses Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this

43、drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits d

44、elivered to this drawing. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96595 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance

45、characteristics. Test Symbol Test conditions 1/ 2/ -55C TC +125C unless otherwise specified Device type VDDGroup A subgroups Limits 3/ Unit Min Max High level input voltage VIH02, 03 3.0 V 1, 2, 3 2.0 V All 4.5 V 1, 2, 3 2.25 All 5.5 V 1, 2, 3 2.75 Low level input voltage VIL02, 03 3.0 V 1, 2, 3 0.8

46、 V All 4.5 V 1, 2, 3 0.8 All 5.5 V 1, 2, 3 0.8 High level output voltage VOHFor all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOH= -8 mA 02, 03 3.0 V 1, 2, 3 2.4 V For all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSS

47、IOH= -12 mA All 4.5 V 1, 2, 3 3.15 V Low level output voltage VOLFor all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOL= +8 mA 02, 03 3.0 V 1, 2, 3 0.4 V For all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOL= +12 mA

48、 All 4.5 V 1, 2, 3 0.4 V Input current high IIHFor input under test, VIN= VDDFor all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 +1.0 A Input current low IILFor input under test, VIN= VSSFor all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 -1.0 A Output current (source) IOH 4/ For output under test VOUT= VDD- 0.4 V; For all other inputs, VIN = VDDor VSS02, 03 3.0 V and 3.6 V 1, 2, 3 -8.0 mA For output under test VOUT= VDD- 0.4 V; For all other inputs, VIN = VDDor VSSAll 4.5 V and 5.5 V 1, 2, 3 -12.0 mA Output current (sink) IOL 4/ F