DLA SMD-5962-96518 REV G-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED QUADRUPLE 2-INPUT AND GATE MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R075-97. - jak 96-11-25 Monica L. Poelking B Incorporate NOR and update boilerplate to latest MIL-PRF-38535 requirements. - CFS 01-06-11 Thomas M. Hess C Correct the title to accurately describe the device func
2、tion. Update boilerplate to the latest MIL-PRF-38535 requirements. - jak 07-09-14 Thomas M. Hess D Add device types 02 and 03. Add die appendix - jak 08-05-05 Thomas M. Hess E Change footnote 6 in section 1.5, herein. - jak 08-12-03 Thomas M. Hess F To change RHA level “H” to “G” for device type 01.
3、 Update radiation features in section 1.5 and table IB. Update boilerplate paragraphs to current requirements of MIL-PRF-38535 - MAA 11-03-17 David J. Corbett G Add equivalent test circuit and footnote 5 in figure 4. Delete class M requirements. MAA 12-07-24 Thomas M. Hess REV SHEET REV G G G G G G
4、G G SHEET 15 16 17 18 19 20 21 22 REV STATUS REV G G G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Larry T. Gauder DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguye
5、n THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, QUADRUPLE 2-INPUT AND GATE, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-06-12 AMSC N/A REVISION LEVEL G SIZE A CAG
6、E CODE 67268 5962-96518 SHEET 1 OF 22 DSCC FORM 2233 APR 97 5962-E377-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96518 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FOR
7、M 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). W
8、hen available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. 5962 G 96518 01 V X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.
9、4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) id
10、entify the circuit function as follows: Device type Generic number Circuit function 01 54ACS08 Radiation hardened, quadruple 2-input AND gate 02 54ACS08E Enhanced, radiation hardened, quadruple 2-input AND gate 03 54ACS08E Enhanced, radiation hardened, quadruple 2-input AND gate 1.2.3 Device class d
11、esignator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as fol
12、lows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. . Provided by IHSNot for ResaleNo reproduction or networking permitted
13、 without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96518 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/, 2/, 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3 V
14、dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds) +300C Thermal resistance, junction-to-case (JC)
15、: Device type 01, case outlines C and X See MIL-STD-1835 Device types 02 and 03, case outline X . 15.5C/W Junction temperature (TJ) +175C Maximum package power dissipation (PD): Device type 01 . 1.0 W Device type 02 and 03 . 3.2 W 4/ 1.4 Recommended operating conditions. 2/, 3/ Supply voltage range
16、(VDD): Device type 01 . +4.5 V dc to +5.5 V dc Device type 02 and 03 . +3.0 V dc to +5.5 V dc Input voltage range (VIN) . +0.0 V dc to VDDOutput voltage range (VOUT) +0.0 V dc to VDDCase operating temperature range (TC) -55C to +125C Maximum input rise or fall time rate at VDD= 4.5 V (tr, tf) 1 ns/V
17、 5/ 1.5 Radiation features. 7/ Maximum total dose available: Device type 01 (dose rate = 50 300 rads (Si)/s) 5 x 105rads (Si) Device type 02 (effective dose rate = 1 rad (Si)/s) . 1 x 106rad (Si) 6/ Device type 03 (dose rate = 50 300 rads (Si)/s) 5 x 105rads (Si) Single event phenomenon (SEP) : Devi
18、ce type 01: No upsets (SEU) at effective LET (see 4.4.4.4). 80 MeV/(mg/cm2) 8/ No latch-up (SEL) at effective LET (see 4.4.4.4) . 120 MeV/(mg/cm2) 8/ Device types 02 and 03: No upsets (SEU) at effective LET (see 4.4.4.4). 108 MeV/(mg/cm2) 8/ No latch-up (SEL) at effective LET (see 4.4.4.4) . 120 MeV
19、/(mg/cm2) 8/ Dose rate upset (20 ns pulse) 1 x 109rad (Si)/s 8/ 9/ Dose rate induced latch-up . None 8/ Dose rate survivability . 1 x 1012rad (Si)/s 8/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade perform
20、ance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise specified. 4/ Per MIL-STD-883 method 1012.1 sect
21、ion 3.4.1, PD(Package) = (TJ(max) - TC(max) . JC5/ Derate system propagation delays by difference in rise time to switch point for tror tf 1 ns/V. 6/ Device type 02 is irradiated at dose rate = 50 - 300 rads (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is guaranteed to a maxi
22、mum total dose specified. The effective dose rate after extended room temperature anneal = 1 rad (Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for these devices only applies to the specified effective dose rate, or lower, environment. 7/ Radiation tes
23、ting is performed on the standard evaluation circuit (SEC). 8/ Limits are guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. 9/ This limit is applicable for device type 01, 02, and 03 with VDD 4.5 V. Device types 02 and
24、 03 do not meet this limit at VDD 4.5 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96518 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCU
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