DLA SMD-5962-96515 REV G-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED QUADRUPLE 2-INPUT NOR GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf
《DLA SMD-5962-96515 REV G-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED QUADRUPLE 2-INPUT NOR GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-96515 REV G-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED QUADRUPLE 2-INPUT NOR GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf(26页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R072-97. jak 96-11-25 Monica L. Poelking B Incorporate NOR and update boilerplate to latest MIL-PRF-38535 requirements. CFS 01-06-11 Thomas M. Hess C Update boilerplate to MIL-PRF-38535 requirements and to incl
2、ude the radiation hardness boilerplate paragraphs. Add appendix A to the document. Change voltage level testing designations in switching waveforms and test circuit, figure 4. - LTG 07-10-04 Thomas M. Hess D Add device types 02 and 03. - jak 08-03-27 Thomas M. Hess E Change footnote 6 in section 1.5
3、, herein. - jak 08-12-03 Thomas M. Hess F To change RHA level “H” to “G” for device type 01. Update radiation features in section 1.5 and table IB. Update boilerplate paragraphs to current requirements of MIL-PRF-38535 - MAA 11-03-11 David J. Corbett G Add footnote 5 to figure 4. Add equivalent test
4、 circuit to figure 4. - jak 12-07-09 Thomas M. Hess REV SHEET REV G G G G G G G G G G G SHEET 15 16 17 18 19 20 21 22 23 24 25 REV STATUS REV G G G G G G G G G G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3
5、990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED QUADRUPLE 2-INPUT NOR GATE, TTL COMPATIBLE INPUTS, MONOLITHIC SI
6、LICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-05-13 AMSC N/A REVISION LEVEL G SIZE A CAGE CODE 67268 5962-96515 SHEET 1 OF 25 DSCC FORM 2233 APR 97 5962-E394-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICRO
7、CIRCUIT DRAWING SIZE A 5962-96515 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V
8、). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 G 96515 01 V X C Federal
9、stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked
10、 with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows
11、: Device type Generic number Circuit function 01 54ACTS02 Radiation hardened, quadruple 2-input NOR gate, TTL compatible inputs 02 54ACTS02E Enhanced, radiation hardened, quadruple 2-input NOR gate, TTL compatible inputs 03 54ACTS02E Enhanced, radiation hardened, quadruple 2-input NOR gate, TTL comp
12、atible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuit
13、s in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line X
14、 CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE
15、 A 5962-96515 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range, any pin (VIN) . -0.3 V dc to VDD+ 0.3 V dc DC output voltage range, any pin (V
16、OUT) -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN) . 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds). +300C Thermal resistance, junction-to-case (JC): Case outline C See MIL-STD-1835 Case outline
17、 X . 15.5C/W Junction temperature (TJ) +175C Maximum package power dissipation (PD): Device type 01 . 1.0 W Device type 02 and 03 . 3.2 W 4/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD): Device type 01 . +4.5 V dc to +5.5 V dc Device type 02 and 03 . +3.0 V dc to 5.5 V dc I
18、nput voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT) . +0.0 V dc to VDDCase operating temperature range (TC) . -55C to +125C Maximum input rise or fall time at VDD= 4.5 V (tr, tf) 1 ns/V 5/ 1.5 Radiation features. 7/ Maximum total dose available: Device type 01 (dose rate = 50 300 ra
19、ds (Si)/s) . 5 x 105rads (Si) Device type 02 (effective dose rate = 1 rad (Si)/s) 1 x 106rad (Si) 6/ Device type 03 (dose rate = 50 300 rads (Si)/s) . 5 x 105rads (Si) Single event phenomenon (SEP): Device type 01: No SEU occurs at effective LET (see 4.4.4.4) . 80 MeV/(mg/cm2) 8/ No SEL occurs at ef
20、fective LET (see 4.4.4.4) 120 MeV/(mg/cm2) 8/ Device types 02 and 03: No SEU occurs at effective LET (see 4.4.4.4) . 108 MeV/(mg/cm2) 8/ No SEL occurs at effective LET (see 4.4.4.4) 120 MeV/(mg/cm2) 8/ Dose rate induced upset (20 ns pulse) . 1 x 109rads (Si)/s 8/ 9/ Dose rate induced latch-up None 8
21、/ Dose rate survivability 1 x 1012rads (Si)/s 8/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The
22、limits for the parameters specified herein shall apply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise specified. 4/ Per MIL-STD-883 method 1012.1 section 3.4.1, PD(Package) = (TJ(max) - TC(max) . JC5/ Derate system propagation delays by difference in ri
23、se time to switch point for tror tf 1 ns/V. 6/ Device type 02 is irradiated at dose rate = 50 - 300 rads (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is guaranteed to a maximum total dose specified. The effective dose rate after extended room temperature anneal = 1 rad (Si)/s
24、 per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for these devices only applies to the specified effective dose rate, or lower, environment. 7/ Radiation testing is performed on the standard evaluation circuit (SEC). 8/ Limits are guaranteed by design or proce
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