DLA SMD-5962-95747 REV C-1999 MICROCIRCUIT DIGITAL RADIATION HARDENED HIGH SPEED CMOS OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON《高速抗辐.pdf
《DLA SMD-5962-95747 REV C-1999 MICROCIRCUIT DIGITAL RADIATION HARDENED HIGH SPEED CMOS OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON《高速抗辐.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-95747 REV C-1999 MICROCIRCUIT DIGITAL RADIATION HARDENED HIGH SPEED CMOS OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON《高速抗辐.pdf(26页珍藏版)》请在麦多课文档分享上搜索。
1、REVISIONSLTR DESCRIPTION DATE (YR -MO -DA) APPROVEDA Changes IAW NOR 5962-R061-97 - cfs 96-11-21 Monica L. PoelkingB Add device class T criteria. Editorial changes throughout. - jak 98-12-07 Monica L. PoelkingC Correct the Total Dose Rate and update RHA levels. LTG 99-04-28 Monica L. PoelkingREVSHEE
2、TREV B B B B B B B B B B BSHEET 15 16 17 18 19 20 21 22 23 24 25REV STATUS REV C B C B B C C C C B B B B BOF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14PMIC N/A PREPARED BY Larry T. GauderDEFENSE SUPPLY CENTER COLUMBUSSTANDARDMICROCIRCUITDRAWINGCHECKED BYThanh V. NguyenCOLUMBUS, OHIO 43216THIS DRA
3、WING IS AVAILABLEFOR USE BY ALLDEPARTMENTSAPPROVED BYMonica L. PoelkingMICROCIRCUIT, DIGITAL, RADIATION HARDENED,HIGH SPEED CMOS, OCTAL TRANSPARENT LATCH WITH THREE-STATE OUTPUTS, TTL COMPATIBLEAND AGENCIES OF THEDEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 95-10-13INPUTS, MONOLITHIC SILICONAMSC N/A
4、REVISION LEVELCSIZEACAGE CODE67268 5962-95747SHEET 1 OF 25DSCC FORM 2233APR 97 5962 -E243-99DISTRIBUTION STATEMENT A . Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWING
5、SIZEA 5962-95747DEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 2DSCC FORM 2234APR 971. SCOPE1.1 Scope . This drawing documents three product assurance class levels consisting of high reliability (device classes Q and M),space application (device class V) and for appro
6、priate satellite and similar applications (device class T). A choice of case outlinesand lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of RadiationHardness Assurance (RHA) levels are reflected in the PIN. For device class T, the user
7、is encouraged to review the manufacturersQuality Management (QM) plan as part of their evaluation of these parts and their acceptability in the intended application.1.2 PIN . The PIN is as shown in the following example:5962 R 95747 01 V X CFederal RHA Device Device Case Lead stock class designator
8、type class outline finishdesignator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / ( see 1.2.3)/ Drawing number1.2.1 RHA designator . Device classes Q, T and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and aremarked with the appropriate RHA designator. Device class
9、 M RHA marked devices meet the MIL-PRF-38535, appendix Aspecified RHA levels and are marked with the appropriate RHA designator. A dash ( -) indicates a non -RHA device.1.2.2 Device type(s) . The device type(s) identify the circuit function as follows:Device type Generic number Circuit function01 HC
10、TS373 Radiation hardened, SOS, high speed CMOS,octal transparent latch with three-state outputs,TTL compatible inputs1.2.3 Device class designator . The device class designator is a single letter identifying the product assurance level as follows:Device class Device requirements documentationM Vendo
11、r self -certification t o the requirements for MIL-STD-883 compliant, non -JANclass level B microcircuits in accordance with MIL-PRF-38535, appendix AQ, V Certification and qualification to MIL-PRF-38535T Certification and qualification to MIL-PRF-38535 with performance as specifiedin the device man
12、ufacturers approved quality management plan.1.2.4 Case outline(s) . The case outline(s) are as designated in MIL-STD-1835 and as follows:Outline letter Descriptive designator Terminals Package styleR CDIP2-T20 20 Dua l-in-lineX CDFP4-F20 20 Flat pack1.2.5 Lead finish . The lead finish is as specifie
13、d in MIL-PRF-38535 for device classes Q, T and V or MIL-PRF-38535,appendix A for device class M.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGSIZEA 5962-95747DEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000 REVISI
14、ON LEVEL C SHEET 3DSCC FORM 2234APR 971.3 Absolute maximum ratings . 1 / 2 / 3 /Supply voltage range (V CC ) . -0.5 V dc to +7.0 V dcDC input voltage range (V IN ) . -0.5 V dc to V CC + 0.5 V dcDC output voltage range (V OUT ) -0.5 V dc to V CC + 0.5 V dcDC input current, any one input (I IN ) . 10
15、mADC output current, any one output (I OUT ) . 25 mAStorage temperature range (T STG ) -65 C to +150 CLead temperature (soldering, 10 seconds) +265 CThermal resistance, junction -to -case ( JC ):Case outline R . 24 C/WCase outline X . 28 C/WThermal resistance, junction -to -ambient ( JA ):Case outli
16、ne R . 72 C/WCase outline X . 107 C/WJunction temperature (T J ) . +175 CMaximum package power dissipation at T A = +125 C (P D ) : 4 /Case outline R . 0.69 WCase outline X . 0.47 W1.4 Recommended operating conditions . 2 / 3 /Supply voltage range (V CC ) . +4.5 V dc to +5 .5 V dcInput voltage range
17、 (V IN ) . +0.0 V dc to V CCOutput voltage range (V OUT ) . +0.0 V dc to V CCMaximum low level input voltage (V IL ) . 0.8 VMinimum high level input voltage (V IH ) V CC /2Case operating temperature range (T C ) . -55 C to +125 CMaximum input rise and fall time at V CC = 4.5 V ( t r , t f ) 500 ns1.
18、5 Radiation features .Maximum total dose available (dose rate = 50 300 rad ( Si)/s)(Device classes M ,Q, or V) . 2 x 10 5 Rads (Si)(Device class T) 1 x 10 5 Rads (Si)Single event phenomenon (SEP) effectivelinear energy threshold (LET) no upsets (see 4.4.4.4) 100 MeV/(cm 2 /mg) 5 /Dose rate upset (20
19、 ns pulse) 1 x 10 10 Rads (Si)/ s 5 /Latch-up None 5 /Dose rate survivability . 1 x 10 12 Rads (Si)/ s 5 /1 / Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at themaximum levels may degrade performance and affect reliability.2 / Unless otherwi
20、se noted, all voltages are referenced to GND.3 / The limits for the parameters specified herein shall apply over the full specified V CC range and case temperature range of-55 C to +125 C unless otherwise noted.4 / If device power exceeds pack age dissipation capability, provide heat sinking or dera
21、te linearly (the derating is based on JA ) atthe following rate:Case outline R 13.9 mW/ CCase outline X . 9.3 mW/ C5 / Guaranteed by design or process but not tested.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGSIZEA 59
22、62-95747DEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000 REVISION LEVEL B SHEET 4DSCC FORM 2234APR 972. APPLICABLE DOCUMENTS2.1 Government specification, standards, and handbooks . The following specification, standards, and handbooks form a part ofthis drawing to the extent specified herein.
23、 Unless otherwise specified, the issues of these documents are those listed in the issueof the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation.SPECIFICATIONDEPARTMENT OF DEFENSEMIL-PRF-38535 - Integrated Circuits, Manufacturing,
24、General Specification for.STANDARDSDEPARTMENT OF DEFENSEMIL -STD -883 - Test Method Standard Microcircuits.MIL-STD-973 - Configuration Management.MIL-STD-1835 - Interface Standard For Microcircuit Case Outlines.HANDBOOKSDEPARTMENT OF DEFENSEMIL-HDBK-103 - List of Standard Microcircuit Drawings (SMDs
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