DLA SMD-5962-95650 REV C-2000 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS QUAD 2-INPUT NAND GATE MONOLITHIC SILICON《数字反射先进互补金属氧化物半导体 四重2输入与非硅单片电路线型微电路》.pdf

《DLA SMD-5962-95650 REV C-2000 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS QUAD 2-INPUT NAND GATE MONOLITHIC SILICON《数字反射先进互补金属氧化物半导体 四重2输入与非硅单片电路线型微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-95650 REV C-2000 MICROCIRCUIT DIGITAL RADIATION HARDENED ADVANCED CMOS QUAD 2-INPUT NAND GATE MONOLITHIC SILICON《数字反射先进互补金属氧化物半导体 四重2输入与非硅单片电路线型微电路》.pdf（23页珍藏版）》请在麦多课文档分享上搜索。

1、LTR A B I Changes in accordance with NOR 5962-R037-99 99-02-1 9 Monica L. Poelking I DESCRIPTION DATE (YR-MO-DA) APPROVED 97-1 0-22 Monica L. Poelking Changes in accordance with NOR 5962-R303-97 C REV STATUS OF SHEETS Update boilerplate to MIL-PRF-38535 and updated appendix A. Editorial changes thro

2、ughout. - tmh 00-07-1 7 Monica L. Poelking R EV SHEET cccccccccccccc 12 3 4 5 6 7 8 9 1011 1213 14 PMIC NIA STANDARD PREPAREDBY Joseph A. Kerby CHECKED BY COLUMBUS, OHIO 43216 DEFENSE SUPPLY CENTER COLUMBUS MICROCIRCUIT DRAW1 NG Thanh V. Nguyen THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AN

3、D AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC NIA APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE MICROCIRCUIT, DIGITAL, RADIATION NAND GATE, MONOLITHIC SILICON HARDENED ADVANCED CMOS, QUAD 2-INPUT 95-1 2-20 REVISION LEVEL SIZE CAGE CODE 5962-95650 C A 67268 SHEET 1 OF 22 Licensed by Information

4、 Handling Services1. SCOPE DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321 6-5000 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are av

5、ailable and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. SIZE A REVISION LEVEL SHEET C 3 1.2 m. The PIN is as shown in the following example: 5962 F 95650 o1 V T T X 1 II I I I I Federal RHA Dev

6、ice Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) I (see 1.2.3) V Drawing number 1.2.1 RHA desimator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with th

7、e appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device tvpefs). The device type(s) identify the circuit function as follows: Device

8、 tvpe Generic number Circuit function o1 02 ACSOO ACS00-02 11 Radiation hardened SOS, advanced CMOS, quad 2-input NAND gate Radiation hardened SOS, advanced CMOS, quad 2-input NAND gate 1.2.3 Device class desimator. The device class designator is a single letter identifying the product assurance lev

9、el as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q orV Certification and qualification to MIL-PRF-38535 1.2.4 Case outlinefs). The

10、case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive desimator Terminals Packacie stvle C X CDIP2-Tl4 14 dual-i n-line package CDFP3-F14 14 flat package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-3

11、8535, appendix A for device class M. - 11 Device type -02 is the same as device type -01 except that the device type -02 products are manufactured at an overseas wafer foundry. Device type -02 is used to positively identify, by marketing part number and by brand of the actual device, material that i

12、s supplied by an overseas foundry. I 5962-95650 STANDARD MICROCIRCUIT DRAWING DSCC FORM 2234 APR 97 Licensed by Information Handling Services1.3 Absolute maximum ratinas. I/ 21 31 Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (VIN) . -0.5 V dc to VCC + 0.5 V dc DC input

13、current, any one input DC output current, any one output (IOUT) and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. Devices supplied to this drawing meet all levels M, D, L, R, and F of irradiation. However, this device

14、is only tested at the F level. Pre and post irradiation values are identical unless otherwise specified in table I. When performing post irradiation electrical measurements for any RHA level, TA = +25“C. ForceIMeasure functions may be interchanged. Power dissipation capacitance (CPD) determines both

15、 the power consumption (PD) and current consumption (IS). Where PD = (CPD -k CL) (VCC x VCC)f -k (ICC x VCC) IS = (CPD -k CL) VCCf -k ICC f is the frequency of the input signal. DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321 6-5000 - 11 - 21 - 31 - 41 - 51 - 61 - 71 SIZE A REVISION LEVEL SHEET C

16、 8 The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2 herein. For VOUT measurements, L 0.5 V and H t 4.0 V. AC li

17、mits at VCC = 5.5 V are equal to the limits at VCC = 4.5 V. For propagation delay tests, all paths must be tested. I 5962-95650 STANDARD MICROCIRCUIT DRAWING DSCC FORM 2234 APR 97 Licensed by Information Handling ServicesDevice type L L H H Case outlines L H H H L H H L Terminal number DEFENSE SUPPL

18、Y CENTER COLUMBUS COLUMBUS, OHIO 4321 6-5000 1 2 3 4 5 6 7 8 9 10 11 12 13 14 REVISION LEVEL SHEET C 9 All C and X Terminal symbol Al B1 Y1 A2 B2 Y2 GND Y3 A3 B3 Y4 A4 B4 vcc FIGURE 1. Terminal connections. Inputs I outputs I I H = High voltage level L = Low voltage level FIGURE 2. Truth table. STAN

19、DARD MICROCIRCUIT DRAWING IA SIZE I I 5962-95650 DSCC FORM 2234 APR 97 Licensed by Information Handling ServicesFIGURE 3. Lociic diaciram. DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321 6-5000 I 5962-95650 SIZE A REVISION LEVEL SHEET C IO STANDARD MICROCIRCUIT DRAWING DSCC FORM 2234 APR 97 Licen

20、sed by Information Handling ServicesI NPLJl DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321 6-5000 O II T P II T REVISION LEVEL SHEET C 11 NOTES: 1. CL = 50 pF minimum or equivalent (includes test jig and probe capacitance). 2. RL = 500Q or equivalent. 3. Input signal from pulse generator: VIN =

21、0.0 V to VCC; PRR 1 O MHz; tr 3.0 ns; tf 3.0 ns; tr and tf shall be measured from 0.1 VCC to 0.9 VCC and from 0.9 VCC to 0.1 VCC, respectively. FIGURE 4. Switchinci waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING I 5962-95650 Licensed by Information Handling Services4.4 Conformance inspect

22、ion. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein except where option 2 of MIL-PRF-38535 permits alternate in-line control testing. Quality conformance inspection for device clas

23、s M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4.1 Group A inspection. Subgroups

24、(in accordance with MIL-STD-883, method 5005, table I) Device class M 1,7,9 a. Tests shall be as specified in table IIA herein. Subgroups (in accordance with MIL-PRF-38535, table Ill) Device Device class Q class V 1,7,9 1,7,9 b. For device class M, subgroups 7 and 8 tests shall be sufficient to veri

25、fy the truth table. For device classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device; these tests shall have been fault graded in accordance with MIL-STD-883, test method 5012 (see 1.5 herein). Subgroup 4, 5 and 6 (CIN and CPD measurement) shall be measured only

26、for the initial qualification and after process or design changes which may affect capacitance. CIN shall be measured between the designated terminal and GND at a frequency of 1 MHz. For CIN and CPD the tests shall be sufficient to validate the limits defined in table I herein. c. Final electrical p

27、arameters (see 4.2) Group A test requirements (see 4.4) Group C end-point electrical Group D end-point electrical Group E end-point electrical parameters (see 4.4) parameters (see 4.4) parameters (see 4.4) TABLE IIA. Electrical test requirements. 1,2,3,7,8,9,10,11 1,2,3,7,8,9, 1,2,3,7,8,9, - 11 10,l

28、l 11 10, 11 2/31 1, 2, 3, 4, 5, 6, 7, 8, 1, 2, 3, 4, 5, 6, 9, 10, 11 7,8,9,10,11 7,8,9,10,11 1, 2, 3, 7, 8, 9, 10, 11 1, 2, 3, 7, 8, 9, 1, 2, 3, 4, 5, 6, 1, 2, 3, 7, 8, 9, 10,ll 10,ll 31 1,7,9 1,7,9 1,7,9 1,7,9 1,7,9 1,7,9 Test requirements DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321 6-5000 I

29、nterim electrical parameters (see 4.2) REVISION LEVEL SHEET C 13 I Parameters 11 I Delta limits I I ICC I 11 .O pA I I I1 5% I lOL/lOH I - 11 These parameters shall be recorded before and after the required burn-in and life test to determine delta limits. 4.4.2 Group C inspection. The group C inspec

30、tion end-point electrical parameters shall be as specified in table II herein. STANDARD MICROCIRCUIT DRAWING IA SIZE I I 5962-95650 DSCC FORM 2234 APR 97 Licensed by Information Handling Services4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD

31、-883: a. Test condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as

32、applicable, in accordance with the intent specified in test method 1005 Of MIL-STD-883. DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321 6-5000 b. TA = +125“C, minimum. SIZE A REVISION LEVEL SHEET C 13 c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additi

33、onal criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level

34、control by the device manufacturers TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test

35、method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). RHA lev

36、els for device classes M, Q and V shall be as specified in MIL-PRF-38535. End-point electrical parameters shall be as specified in table IIA herein. 4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883 method 1 O1 9 and as specified

37、 herein. 4.4.4.1.1 Accelerated aqinq test. Accelerated aging tests shall be performed on all devices requiring a RHA level greater than 5k rads(Si). The post-anneal end-point electrical parameter limits shall be as specified in table I herein and shall be the pre-irradiation end-point electrical par

38、ameter limit at +25“C 15“c. Testing shall be performed at initial qualification and after any design or process changes which may affect the RHA response of the device. 4.4.4.2 Dose rate induced latchup testing. Dose rate induced latchup testing shall be performed in accordance with test method 1020

39、 of MIL-STD-883 and as specified herein (see 1.4 herein). Tests shall be performed on devices, SEC, or approved test structures at technology qualification and after any design or process changes which may effect the RHA capability of the process. 4.4.4.3 Dose rate upset testing. Dose rate upset tes

40、ting shall be performed in accordance with test method 1021 of MIL- STD-883 and herein (see 1.4 herein). a. Transient dose rate upset testing shall be performed at initial qualification and after any design or process changes which may effect the RHA performance of the devices. Test 1 O devices with

41、 O defects unless otherwise specified. b. Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved radiation hardness assurance plan and MIL-PRF-38535. 4.4.4.4 Sinde event phenomena SEP). SEP testing shall be required on class V devices (see 1.4 h

42、erein). SEP testing shall be performed on a technology process on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or latchup characteristics. The rec

43、ommended test conditions for SEP are as follows: a. The ion beam angle of incidence shall be between normal to the die surface and 60“ to the normal, inclusive (.e. O“ a b. The fluence shall be t 1 O0 errors or t 1 O6 ions/cm2. c. The flux shall be between 10 and 1 O5 ions/cm2/s. The cross-section s

44、hall be verified to be flux independent by angle a 60“). No shadowing of the ion beam due to fixturing or package related effects is allowed. measuring the cross-section at two flux rates which differ by at least an order of magnitude. d. The particle range shall be t 20 microns in silicon. e. The t

45、est temperature shall be +25“C and the maximum rated operating temperature 11 0C. I 5962-95650 STANDARD MICROCIRCUIT DRAWING DSCC FORM 2234 APR 97 Licensed by Information Handling Servicesf. Bias conditions shall be defined by the manufacturer for latchup measurements. g. Test four devices with zero

46、 failures. 4.5 Methods of inspection. Methods of inspection shall be as specified as follows: 4.5.1 Voltaqe and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal. Currents given are conventional current and positive when flowing into the referenc

47、ed terminal. Open Ground Vcc=5 V f 0.5 V 3, 6, 8, 11 - 1/ Each pin except VCC and GND will have a series resistor of 47KQ &%, for irradiation testing. 7 1,2,4,5, 9, 10, 12, 13, 14 5. PACKAGING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 4321 6-5000 5.1 Packaqinq requirements. The requirements for

48、packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES SIZE A REVISION LEVEL SHEET C 14 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original

49、 equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. 6.2 Confiauration control of SMDs. All proposed changes to existing SMDs will be coordinated with the users of record for the individual documents. This coordination will be accomplished in accordance with MIL-STD-973 using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Mil