DLA SMD-5962-95599 REV B-1999 MICROCIRCUIT MEMORY DIGITAL CMOS FIELD PROGRAMMABLE GATE ARRAY 4000 GATES MONOLITHIC SILICON《可编程陈列4000GATES互补金属氧化物半导体硅单片电路线型微电路》.pdf

《DLA SMD-5962-95599 REV B-1999 MICROCIRCUIT MEMORY DIGITAL CMOS FIELD PROGRAMMABLE GATE ARRAY 4000 GATES MONOLITHIC SILICON《可编程陈列4000GATES互补金属氧化物半导体硅单片电路线型微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-95599 REV B-1999 MICROCIRCUIT MEMORY DIGITAL CMOS FIELD PROGRAMMABLE GATE ARRAY 4000 GATES MONOLITHIC SILICON《可编程陈列4000GATES互补金属氧化物半导体硅单片电路线型微电路》.pdf（18页珍藏版）》请在麦多课文档分享上搜索。

1、LTR DESCRIPTION DATE (YR-MO-DA) APPROVED 97-10-31 A Raymond Monnin Removed vendor 65786, added vendor OWGG6. Changed number of devices tested in O/V (latch-up) test from 5 to 3. Changed Table I, ICC from 10 mA to 20 mA. Added footnote Table I, for Dynamic I power. ksr I I I DRAWING B I Added case Y

2、to cover pin arid array packacre. Editorial chancres. ksr I 99-06-1 6 I Raymond Monnin s PMIC NIA DRAWING APPROVAL DATE 96-06-06 REVISION LEVEL STANDARD MICROCIRCUIT 5962-95599 SIZE CAGE CODE A 67268 DEFENSE SUPPLY CENTER COLUMBUS http:/www.dscc.dla.mil PREPAREDBY COLUMBUS, OHIO 42316 Kenneth Rice C

3、HECKED BY Jeff Bowling THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC NIA MICROCIRCUIT, MEMORY, DIGITAL, CMOS, FIELD PROGRAMMABLE GATE ARRAY 4000 GATES, MONOLITHIC SILICON APPROVEDBY Michael A. Frye B SHEET 1 OF 17 DSCC FORM 2233 APR 97 DISTRIBUTI

4、ON STATEMENT A. Approved for public release; distribution is unlimited. 5962-E259-99 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1. SCOPE STAN DARD MICROCIRCUIT DRAWING 1 .I Scope. This drawing documents two product assurance class levels consist

5、ing of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN

6、. 1.2 PIN. The PIN is be as shown in the following example: 5162 I, 95599 0 i“ 1 Federal RA Device Device Case Lead stock class designator type class outline finish designator (1.2.1) (See 1.2.2) designator (See 1.2.4) (See 1.2.5) I (See 1.2.3) v Drawing number 1.2.1 RHA desicrnator. Device classes

7、Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA devi

8、ce. 1.2.2 Device tvpels). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit function Delay Factor IK) - Min Max o1 7C386A-X 4000 Gate CMOS FPGA 0.39 3.00 02 QLI 6X24B-0 4000 Gate CMOS FPGA 0.39 1.82 03 QLI 6X24B-1 4000 Gate CMOS FPGA 0.39 1.56 1.2.

9、3 Device class desicrnator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M QorV Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accorda

10、nce with MIL-PRF-38535, appendix A Certification and qualification to MIL-PRF-38535 1.2.4 Case outlinels). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive desicrnator Terminals Packacre style SIZE A 5962-95599 X See fi ure 1 160 Quad flat package Y CM

11、Gf7-Pl44 144 Pin Grid Array 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. -2.0 V dc to +7.0 V dc -2.0 V dc to +I 3.5 V dc 21 -2.0 V dc to +7.0 V dc 21 2.5 W 31 +300“ C 5.3“ CNV See MIL-STD-1835 +175“C 4

12、1 10 years (minimum) -65C to +15O“C - 11 Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. - 21 Minimum dc input voltage is -0.5 V, which may overshoot to -2.0 V for periods le

13、ss than 20 ns. Maximum dc voltage on output pins is V - 31 Must withstand $5 added PD due to short circuit test (e.g., 10s). - 41 Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. + 0.5 V

14、, which may overshoot to +7.0 V for periods less than 20 ns under load conditions. DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 42316-5000 I SHEET REVISION LEVEL B DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1.4 Recommended

15、 operatincr conditions. s/ Case operating temperature Range(T ) - - - - - - - - Supply voltage relative to ground(Vc. - - - - - - - - - Ground voltage (GND) - - - - - - - - - - - - - - - - - - - - Input high voltage (VI ) - - - - - - - - - - - - - - - - - - - - Input lowvoltage (V - - - - - - - - -

16、- - - - - - - - - - - IL -55C to +125“C +4.5 V dc minimum to +5.5 V dc maximum O V dc 2.0 V dc minimum 0.8V dc maximum 1.5 Dicrital locric testincr for device classes Q and V. logic tests (MIL-STD-883, test method 5012) - - - - Fault coverage measurement of manufacturing e/ percent 2. APPLICABLE DOC

17、UMENTS STAN DARD MICROCIRCUIT DRAWING 2.1 Government si3ecification. standards. and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the SIZE A 59

18、62-95599 issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION M IL ITARY MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS M IL ITARY MIL-STD-883 - Test Method Standar

19、d Microcircuits. MIL-STD-973 - Configuration Management. MIL-STD-1835 - Interface Standard For Microcircuit Case Outlines. HANDBOOKS M IL ITARY MIL-HDBK-103 - List of Standard Microcircuit Drawings (SMDs). MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the spec

20、ification, standards, and handbooks are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 191 11 -5094.) 2.2 Non-Government wblications. The following documents form a part of this document to the extent specified herein. Unless otherwise speci

21、fied, the issues of the documents which are DoD adopted are those listed in the issue of the DODISS cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the documents cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATE

22、RIALS (ASTM) ASTM Standard FI 192M-95 - Standard Guide for the Measurement of Single Event Phenomena from Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to the American Society for Testing and Materials Street, Philadelphia, PA 19103.) ELECTRO

23、NICS INDUSTRIES ALLIANCE (EIA) JEDEC Standard EIA/JESD 78 - IC Latch-Up Test. ieavy Ion 1916 Race (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Blvd., Arlington, VA 22201. (Non-Government standards and other publications are normally available fr

24、om the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) - 5/ - 6/ All voltage values in this drawing are with respect to Vss. Values will be added when they become available. DEFENSE SUPPLY CENTER

25、COLUMBUS COLUMBUS, OHIO 42316-5000 I SHEET REVISION LEVEL B DSCC FORM 2234 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, th

26、e text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. STAN DARD MICROCIRCUIT DRAWING 3. REQUIREMENTS SIZE A 5962-95599 3.1 Item reauirements. The individual item requirements for device cl

27、asses Q and V shall be in accordance with MIL-PRF- 38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class

28、 M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Desian. construction. and phvsical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL

29、-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlinels). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Radiation exposure circuit. The radiation exposure cir

30、cuit will be provided when RHA product becomes available. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply ov

31、er the full case operating temperature range. 3.4 Electrical test reauirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Markinq. The part shall be marked with the PIN listed in 1.2 herein. In a

32、ddition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designat

33、or shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as

34、required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requireme

35、nts of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved s

36、ource of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance a

37、s required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of chanae for device class M. For device class M, notification to DSCC-VA of change of product (see 6

38、.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-STD-973. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required

39、 documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit aroup assianment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 42 (see MIL-PRF-38535, appendix A). 3.1 1 Processina optio

40、ns. Since the device is capable of being programmed by either the manufacturer or the user to result in a wide variety of configurations, two processing options are provided for selection in the contract. DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 42316-5000 I SHEET REVISION LEVEL B DSCC FORM 223

41、4 APR 97 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-3.1 1 .I Unproarammed device delivered to the user. All testing shall be verified through group A testing as defined in table IIA. It is recommended that users perform subgroups 7 and 9 after p

42、rogramming to verify the specific program configuration. 3.1 1.2 Manufacturer-proarammed device delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. 3

43、.12 Data Retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done for initial characterization and after any design or process changes which may affect data retention. The methods and procedures may be vendor specific, but shall

44、guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with the test data. 4. QUALITY ASSURANCE PROVISIONS S

45、TAN DARD MICROCIRCUIT DRAWING 4.1 Samplina and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit,

46、 or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screeninq. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification

47、 and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. SIZE A 5962-95599 4.2.1 Additional criteria for device class M. a. Delete the sequence specifie

48、d as initial (pre-burn-in) electrical parameters through interim (post-burn-in) electrical parameters of method 5004 and substitute lines 1 through 5 of table IIA herein. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the

49、 preparing or acquiring activity upon request. Test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. Use of built-in test circuitry testing the entire lot to verify programmability and AC performance without programming the user array is an option the manufacturer may use. Interim and final electrical test parameters shall be as specified in table IIA herein b. c. 4.2.2 Additional criteria for devi