DLA SMD-5962-95521 REV C-2013 MICROCIRCUIT MEMORY DIGITAL CMOS 10 000 GATE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DAY) APPROVED A Added paragraphs 4.4.1e and 4.4.1f, changed Idd value of table IIB from 1 A to 1 mA. ksr 99-04-09 Raymond Monnin B Boilerplate update and part of five year review. tcr 06-03-14 Raymond Monnin C Update drawing to meet current MIL-PRF-38535 requir
2、ements. - glg 13-12-13 Charles Saffle REV SHEET REV C C C C C SHEET 15 16 17 18 19 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO
3、43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Michael. A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 10,000 GATE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-04-23 AMSC N
4、/A REVISION LEVEL C SIZE A CAGE CODE 67268 5962-95521 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E092-14 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-95521 REV
5、ISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the
6、 Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 95521 01 M X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device cla
7、ss designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL
8、-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Toggle Speed 01 14100A 10,000 gate, fi
9、eld programmable array 142.9 ns 02 14100A-1 10,000 gate, field programmable array 121.5 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to t
10、he requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive
11、designator Terminals Package style X CMGA11-257C 257 1/ Pin grid array package Y See figure 1 256 Quad flat package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. _ 1/ 257 = actual number of pins used, n
12、ot maximum listed in MIL-STD-1835 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-95521 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum rati
13、ngs. 2/ Supply voltage range to ground potential (VDD) - -0.5 V dc to +7.0 V dc Input voltage range - -0.5 V dc to VDD+0.5 V dc Output voltage range - -0.5 V dc to VDD+0.5 V dc Lead temperature (soldering, 10 seconds) - +300C I/O Source/Sink current (II/O) - 20 mA. Thermal resistance, junction-to-ca
14、se (JC): Case outline X - See MIL-STD-1835 Case outline Y - 13C/W 3/ Junction temperature (TJ) - +150C 4/ Storage temperature range - -65C to +150C 1.4 Recommended operating conditions. 5/ Case operating temperature Range(TC) - -55C to +125C Supply voltage relative to ground(VDD) - +4.5 V dc minimum
15、 to +5.5 V dc maximum Ground voltage (GND) - 0 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these docume
16、nts are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Compo
17、nent Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue,
18、 Building 4D, Philadelphia, PA 19111-5094.) _ 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ When a thermal resistance for this case is specified in MIL-STD-1835 that
19、value shall supersede the value indicated herein. 4/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5/ All voltage values in this drawing are with respect to VSS. Provided by IHSNot fo
20、r ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-95521 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following documents form a part of this doc
21、ument to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. JEDEC INTERNATIONAL (JEDEC) JESD 78 - IC Latch-Up Test. (Applications for copies should be addressed to JEDEC, 3103 North 10thStreet, Suite 240-S,
22、Arlington, VA 22201-2107; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of preced
23、ence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirem
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