DLA SMD-5962-94716 REV F-2003 MICROCIRCUIT HYBRID DIGITAL FLASH ERASABLE PROGRAMMABLE READ ONLY MEMORY 128K X 32-BIT《128K X 32-BIT数字反射和消除和编程只读器混合微电路》.pdf

《DLA SMD-5962-94716 REV F-2003 MICROCIRCUIT HYBRID DIGITAL FLASH ERASABLE PROGRAMMABLE READ ONLY MEMORY 128K X 32-BIT《128K X 32-BIT数字反射和消除和编程只读器混合微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-94716 REV F-2003 MICROCIRCUIT HYBRID DIGITAL FLASH ERASABLE PROGRAMMABLE READ ONLY MEMORY 128K X 32-BIT《128K X 32-BIT数字反射和消除和编程只读器混合微电路》.pdf（41页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added device type 05. Added case outlines M, N, 4, 5, 6, 7, and 8. Added vendor cage code 88379. 96-08-30 K. A. Cottongim B Figure 1; For case outlines 5, 6, 7 and 8 changed dimension D3 min and max from 1.030 and 1.040 inches to 1.020 and 1.060

2、inches. Changed dimension A min from .156 inches to .135 inches. Changed dimension L min from .145 inches to .132 inches. -sld 98-06-25 K.A. Cottongim C Added case outline 9. Figure 1; changed case outline M to be either a single or dual cavity package. Figure 1; changed the dimension A2 max limit f

3、rom .015 inches to .025 inches for case outline M. Added thermal resistance ratings for all case outlines to paragraph 1.3 . Added vendor cage 88379 for case outline M, device types 01 through 05. Table I; changed IOLfrom 12.0 mA to 8.0 mA for the VOLtest. -sld 00-06-20 Raymond Monnin D Added vendor

4、 cage code 0EU86 for device types 01 through 05, case outline N. Drawing updated to reflect current requirements. -sld 03-01-13 Raymond Monnin E Added case outline A. -sld 03-02-21 Raymond Monnin F Added case outline B. Added note to paragraph 1.2.4. -sld 03-11-10 Raymond Monnin REV F SHEET 35 REV F

5、 F F F F F F F F F F F F F F F F F F F SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV F F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Steve L. Duncan DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECK

6、ED BY Michael C. Jones COLUMBUS, OHIO 43216 http:/www.dscc.dla.mil APPROVED BY Kendall A. Cottongim THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-12-16 MICROCIRCUIT, HYBRID, DIGITAL, FLASH ERASABLE/PROGRAMMABLE READ ONLY MEMOR

7、Y, 128K x 32-BIT AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 67268 5962-94716 SHEET 1 OF 35 DSCC FORM 2233 APR 97 5962-E013-04 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH

8、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94716 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case ou

9、tlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 94716 01 H A X Federal RHA Device Devi

10、ce Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be ma

11、rked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time 01 F128K32-150 EPROM, FLASH, 128K x 32-bit 150 ns 02 F128K32-120 EPROM, FLASH, 1

12、28K x 32-bit 120 ns 03 F128K32-090 EPROM, FLASH, 128K x 32-bit 90 ns 04 F128K32-070 EPROM, FLASH, 128K x 32-bit 70 ns 05 F128K32-060 EPROM ,FLASH, 128K x 32-bit 60 ns 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All lev

13、els are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This level

14、 is intended for use in space applications. H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Pr

15、ocess Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C and D). E Designates devices which are based upon one of the other classes (K, H, or G) with excep

16、tion(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Manufacturer specified quality class.

17、Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94716 DEFENSE SUPPLY CENTER COLUM

18、BUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style A See figure 1 68 Co-fired ceramic, single cavity, quad flat pack B

19、See figure 1 68 Co-fired ceramic, single cavity, quad flat pack M 1/ See figure 1 68 Co-fired ceramic, single/dual cavity, quad flatpack, lead formed N See figure 1 68 Co-fired ceramic, single cavity, quad flatpack, lead formed S See figure 1 66 Hex-in-line, single cavity, with standoffs T See figur

20、e 1 66 Hex-in-line, single cacvity, without standoffs U See figure 1 66 Hex-in-line, single cavity, with standoffs V See figure 1 66 Hex-in-line, single cavity, without standoffs W See figure 1 66 Hex-in-line, single cavity, with standoffs X See figure 1 66 Hex-in-line, single cavity, without stando

21、ffs Y See figure 1 66 Hex-in-line, single cavity, with standoffs Z See figure 1 66 Hex-in-line, single cavity, without standoffs 4 See figure 1 66 Ceramic, single cavity, quad flat pack 5 See figure 1 66 1.075“, hex-in-line, single cavity, with standoffs 6 See figure 1 66 1.075“, hex-in-line, single

22、 cavity, with standoffs 7 See figure 1 66 1.075“, hex-in-line, single cavity, with standoffs 8 See figure 1 66 1.075“, hex-in-line, single cavity, with standoffs 9 1/ See figure 1 68 Co-fired ceramic, single cavity, ultra low profile, quad flatpack 1.2.5 Lead finish. The lead finish shall be as spec

23、ified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 2/ Supply voltage range (VCC) 3/. -2.0 V dc to +7.0 V dc Signal voltage range (any pin except A9 ) 3/ -2.0 V dc to +7.0 V dc Power dissipation (PD). 1.1 W Thermal resistance, junction-to-case (JC): Case outline M . 11.3C/W Case outline A and N .

24、9C/W Case outline 4 4.07C/W Case outlines B and 9 4.57C/W Case outlines 5, 6, 7, and 8 . 13.13C/W Case outlines S, T, U, V, W, X, Y, and Z . 10.63C/W Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Data retention 10 years minimum Endurance (write/erase cycles

25、) . 10,000 cycles minimum A9 voltage for sector protect (VID) 4/ -2.0 V dc to +14.0 V dc 1/ Due to the short leads of case outlines M (single cavity) and case outline 9, caution should be taken if the system application is to be used where extreme thermal transitions can occur. Case outline A can be

26、 used if longer leads are necessary. 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ Minimum DC voltage on input or I/O pins is -0.5 V dc. During voltage transitions, i

27、nput may overshoot VSSto -2.0 V dc for periods of up to 20 ns. Maximum DC voltage on output and I/O pins is VCC+ 0.5 V dc. During voltage transitions, outputs may overshoot to VCC+ 2.0 V dc for periods of up to 20 ns. 4/ Minimum DC input voltage on A9 pin is -0.5 V dc. During voltage transitions, A9

28、 may overshoot VSSto -2.0 V dc for periods of up to 20 ns. Maximum DC input voltage on A9 is +13.5 V dc which may overshoot to +14.0 V dc for periods of up to 20 ns. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

29、 5962-94716 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input low voltage range (VIL) -0.5 V dc to +0.8 V dc Input high voltage range (VIH) +2.0 V dc to

30、 VCC+ 0.3 V dc Case operating temperature range (TC) -55C to +125C A9 voltage for sector protect (VID) . +11.5 V dc to +12.5 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the e

31、xtent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38534 - Hybrid Micr

32、ocircuits, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard

33、 Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbook are available from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of

34、 this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements f

35、or device classes D, E, G, H, and K shall be in accordance with MIL-PRF-38534. Compliance with MIL-PRF-38534 may include the performance of all tests herein or as designated in the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. Therefore, the test

36、s and inspections herein may not be performed for the applicable device class (see MIL-PRF-38534). Furthermore, the manufacturer may take exceptions or use alternate methods to the tests and inspections herein and not perform them. However, the performance requirements as defined in MIL-PRF-38534 sh

37、all be met for the applicable device class. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDA

38、RD MICROCIRCUIT DRAWING SIZE A 5962-94716 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections sha

39、ll be as specified on figure 2. 3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3. 3.2.4 Timing diagram(s). The timing diagram(s) shall be as specified on figures 4, 5, and 6 . 3.2.5 Block diagram. The block diagram shall be as specified on figure 7. 3.2.6 Output load circui

40、t. The output load circuit shall be as specified on figure 8. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test

41、 requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Programming procedure. The programming procedure shall be as specified by the manufacturer and shall be available upon request. 3.6 Marking

42、 of Device(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.7 Data. In addition to the general performance requirements of MIL-PRF-38534, the manuf

43、acturer of the device described herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those which, if

44、 any, are guaranteed. This data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DSCC-VA) upon request. 3.8 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to

45、 this drawing. The certificate of compliance (original copy) submitted to DSCC-VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.9 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided wi

46、th each lot of microcircuits delivered to this drawing. 3.10 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitors. This reprogrammability test shall be done for the initial characterization and after any design process changes which may affect the reprog

47、rammability of the device. The methods and procedures may be vendor specific, but shall guarantee the number of program/erase cycles listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon requ

48、est of the acquiring or preparing activity. 3.11 Data retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall be done for initial characterization and after any design process change which may affect data retention. The methods and procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shall be made available upon request of the acquiring or prep