DLA SMD-5962-94672 REV B-2013 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS SCAN TEST DEVICE WITH 18-BIT UNIVERSAL BUS TRANSCEIVER THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout. jak 07-05-30 Thomas M. Hess B Update boilerplate paragraphs to the current MIL-PRF-38535 requirements. - LTG 13-07-25 Thomas M. Hess REV S

2、HEET REV B B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD

3、MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thanh V. Nguyen APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, SCAN TEST DEVICE WITH 18-BIT UNIVERSAL BUS TRANSCEIVER, THREE-STATE OUT

4、PUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 94-06-08 REVISION LEVEL B SIZE A CAGE CODE 67268 5962-94672 SHEET 1 OF 27 DSCC FORM 2233 APR 97 5962-E504-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT D

5、RAWING SIZE A 5962-94672 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space application (device class V). A choice of ca

6、se outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 94672 01 Q X A Federal stock class desig

7、nator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropr

8、iate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ABT18502 Scan test device with 18-bit universal bus transceiver, three-state outputs, TTL compatible inputs

9、1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL

10、-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 68 Quad flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo reproduction or networking permitted without licens

11、e from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94672 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc DC input voltage range (I/O ports) (VIN) -0.5 V dc

12、to +5.5 V dc 4/ DC input voltage range (except I/O ports) (VIN) -0.5 V dc to +7.0 V dc 4/ DC output voltage range (VOUT) -0.5 V dc to +5.5 V dc 4/ DC output current (IOL) (per output) +96 mA DC input clamp current (IIK) (VIN= 0.0 V) . -18 mA DC output clamp current (IOK) (VOUT= 0.0 V) . -50 mA VCCcu

13、rrent (IVCC) +582 mA Ground current (IGND) +1190 mA Storage temperature range (TSTG) -65C to +150C Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) 1.9C/W Junction temperature (TJ) . +175C Maximum power dissipation (PD) . 684 mW 5/ 1.4 Recommended operating

14、conditions. 2/ 3/ Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Input voltage range (VIN) . +0.0 V dc to VCCOutput voltage range (VOUT) +0.0 V dc to VCCMaximum low level input voltage (VIL ) 0.8 V Minimum high level input voltage (VIH ) . 2.0 V Maximum high level output current (IOH) . -24 mA

15、Maximum low level output current (IOL) . +48 mA Maximum input rise or fall rate (t/V) 10 ns/V Minimum setup time (ts): mAn before mCLKAB or mBn before mCLKBA 4.0 ns mAn before mLEAB or mBn before mLEBA, CLK high 3.5 ns mAn before mLEAB or mBn before mLEBA, CLK low 2.0 ns mAn, mBn, mCLKAB, mCLKBA, mL

16、EAB, mLEBA, mOEAB, or mOEBA before TCK . 4.5 ns TDI before TCK. 7.5 ns TMS before TCK . 3.0 ns Minimum hold time (th): mAn after mCLKAB or mBn after mCLKBA 0.0 ns mAn after mLEAB or mBn after mLEBA . 2.0 ns mAn, mBn, mCLKAB, mCLKBA, mLEAB, mLEBA, mOEAB , or mOEBA after TCK 0.5 ns TDI after TCK . 0.5

17、 ns TMS after TCK 0.5 ns Minimum pulse width: (tw) mCLKAB or mCLKBA, high or low . 3.5 ns mLEAB or mLEBA high . 3.5 ns TCK high or low . 8.0 ns Minimum delay time, power-up to TCK (td) . 50.0 ns 6/ Minimum rise time, VCCpower-up (tr) 1 s 6/ Maximum clock frequency: (fCLK) mCLKAB or mCLKBA . 100 MHz

18、TCK 50 MHz Case operating temperature range (TC) -55C to +125C 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GN

19、D. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ The input and output negative voltage ratings may be exceeded provided that the input and output clamp current ratings are observed. 5/ Power dissipation

20、values are derived using the formula PD= VCCICC+ nVOLIOL, where VCCand IOLare as specified in 1.4 herein, ICCand VOLare as specified in table I herein, and n represents the total number of outputs. 6/ These parameters are not production tested. Provided by IHSNot for ResaleNo reproduction or network

21、ing permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94672 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, stand

22、ards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for

23、. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of t

24、hese documents are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094). 2.2 Non-Government publications. The following document form a part of this document to the extent specified herein. Unless

25、 otherwise specified, the issues of the document which are DOD adopted are those listed in the issue of DODISS cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of documents cited in the solicitation. INSTITUTE OF ELECTRICAL AND EL

26、ECTRONICS ENGINEERS (IEEE) IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary Scan Architecture. (Applications for copies should be addressed to the Institute of Electrical and Electronics Engineers, 445 Hoes Lane, Piscataway, NJ 08854-4150). (Non-Government standards and other publi

27、cations are normally available from the organizations that prepare or distribute the documents. These documents may also be available in or through libraries or other informational services). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cite

28、d herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance

29、with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical

30、dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table s

31、hall be as specified on figure 3. 3.2.4 Block diagram. The block diagram shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94672 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-399

32、0 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.2.5 Test access port controller and scan test registers. The test access port controller and scan test registers shall be as specified on figure 5. 3.2.6 Ground bounce waveforms and test circuit. The ground bounce waveforms and test circuit shall be

33、 as specified on figure 6. 3.2.7 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 7. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteri

34、stics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined i

35、n table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on t

36、he device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-

37、38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to

38、 listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535

39、shall be provided with each lot of microcircuits delivered to this drawing. 3.8 IEEE 1149.1 compliance. This device shall be compliant with IEEE 1149.1 - 1990. . Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 596

40、2-94672 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified VCCGroup A subgroups Limits

41、 3/ Unit Min Max High level output voltage 3006 VOHFor all inputs affecting output under test, VIN= VIH= 2.0 V or VIL= 0.8 V IOH= -3 mA 4.5 V 1, 2, 3 2.5 V 5.0 V 1, 2, 3 3.0 V IOH= -24 mA 4.5 V 1, 2, 3 2.0 V Low level output voltage 3007 VOLFor all inputs affecting output under test VIN= VIH= 2.0 V

42、or VIL= 0.8 V IOL= +48 mA 4.5 V 1, 2, 3 0.55 V Negative input clamp voltage 3022 VIC-For input under test, IIN= -18 mA 4.5 V 1, 2, 3 -1.2 V Input current high 3010 IIH4/ For input under test, VIN= VCCmCLK, mLE, mOE, TCK 4.5 V 1, 2, 3 +1.0 A A or B ports 4.5 V 1, 2, 3 +100 TDI, TMS 4.5 V 1, 2, 3 +10.

43、0 Input current low 3009 IIL4/ For input under test, VIN= GND mCLK, mLE, mOE, TCK 4.5 V 1, 2, 3 -1.0 A A or B ports 4.5 V 1, 2, 3 -100 TDI, TMS 4.5 V 1, 2, 3 -150 Three-state output leakage current high 3021 IOZH5/ For control inputs affecting output under test, VIN= VIH= 2.0 V or VIL= 0.8 V VOUT= 2

44、.7 V 5.5 V 1, 2, 3 50.0 A Three-state output leakage current low 3020 IOZL5/ For control inputs affecting output under test, VIN= VIH= 2.0 V or VIL= 0.8 V VOUT= 0.5 V 5.5 V 1, 2, 3 -50.0 A Off-state leakage current IOFFFor input or output under test, VINor VOUT= 5.5 V All other pins at 0.0 V 0.0 V 1

45、 100 A High-state leakage current ICEXFor output under test, VOUT= 5.5 V Outputs at high logic state 5.5 V 1, 2, 3 50 A Output current 3011 IO6/ VOUT= 2.5 V 5.5 V 1, 2, 3 -50 -200 mA Quiescent supply current delta, TTL input level ICC7/ For input under test, VIN= 3.4 V For all other inputs, VIN= VCC

46、or GND 5.5 V 1, 2, 3 50 A Quiescent supply current, output high 3005 ICCHFor all inputs, VIN= VCCor GND IOUT= 0 A A or B ports 5.5 V 1, 2, 3 5.5 mA Quiescent supply current, output low 3005 ICCL5.5 V 1, 2, 3 38 mA Quiescent supply current, outputs disabled 3005 ICCZ5.5 V 1, 2, 3 5.0 mA Power up thre

47、e-state output leakage current IOZPUmOEAB = mOEBA = 0.8 V VOUT= 2.7 V or 0.5 V 0.0 V or 2.0 V 1, 2, 3 50 mA Power down three-state output leakage current IOZPDmOEAB = mOEBA = 0.8 V VOUT= 2.7 V or 0.5 V 2.0 V or 0.0 V 1, 2, 3 50 mA See footnotes at end of table. Provided by IHSNot for ResaleNo reprod

48、uction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94672 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified VCCGroup A subgroups Limits 3/ Unit Min Max Input capacitance 3012 CINTC= +25C See 4.4.1b Control inputs 5.0 V 4 6.0 pF I/O capacitance 3012 CI/OA or B ports 5.0 V 4 12.0 pF Output capacit