DLA SMD-5962-94667-1995 MICROCIRCUIT DIGITAL RADIATION HARDENED 1750 CHIP SET MULTICHIP MICROCIRCUIT SILICON《1750芯片集硅辐射多片状微电路数字微电路》.pdf

《DLA SMD-5962-94667-1995 MICROCIRCUIT DIGITAL RADIATION HARDENED 1750 CHIP SET MULTICHIP MICROCIRCUIT SILICON《1750芯片集硅辐射多片状微电路数字微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-94667-1995 MICROCIRCUIT DIGITAL RADIATION HARDENED 1750 CHIP SET MULTICHIP MICROCIRCUIT SILICON《1750芯片集硅辐射多片状微电路数字微电路》.pdf（30页珍藏版）》请在麦多课文档分享上搜索。

1、SMD-5962-94667 H 9999996 0073178 2TT M LTR DESCRIPTION DATE (YR-MO-DA) APPROVED REV STATUS REV OF SHEETS 123 SHEET PMIC NIA PREPARED BY I Thms M. Hess CHECKED BY Thomas M. Hess APPROVED BY STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE DRAWING APPROVAL DATE 95-06-12 FOR USE BY ALL DEPARTMEN

2、TS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AHSC N/A REVISION LEVEL ; 1 4 5 6 7 8 9 10 li i2 13 14 DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 MICROCIRCUIT, DIGITAL, RADIATION HARDENED, 1750 CHIP SET, MULTICHIP MICROCIRCUIT, SILICON SIZE 1 CAGE CODE 1 A 67268 5962-94667 SHEET 1 OF 29 JUL 9

3、4 DISTRIBUTION STATEMENT A. Approved for public release: distribution is unlimited. 5962-E214-95 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-94667 9999996 0073379 336 = STBARD HICROCIRCUIT DRAWNG DEFENSE ELECTRONICS SUPPLY CENTER DAYTON,

4、 OHIO 45444 1. SCOPE 1.1 Scope. This drawing forms a part of a one part - one part number documentation system (see 6.6 herein). TWO product assurance classes consisting of military high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and le

5、ad finishes are available and are reflected in the Part or Identifying Nunter (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, “Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices“. When available, a

6、choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 m. The PIN shall be as shown in the following exanple: 5962 H 94667 o1 9. Y X I I - I I I f I I I I I L Lead Case Devi ce L Dev I ce II Federa 1 RHA stock class designator type class out1 ine finish designator (see 1.2

7、.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) +A (see 1.2.3) i Draw i ng nunber 1.2.1 RHA desianator. Device class M RHA marked devices shall meet the MIL-1-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices s

8、hall meet the MIL-1-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device t.We(s1. The device type(s) shall identify the circuit function as follows: Minim Propagat ion delay, Device type Generic nunber Circuit functio

9、n operatina wriod HCLK to OOUTENA 8.0 ns to 33 ns o1 RH-1750 Microprocessor, miltichip module (MCM) 40 ns mx 02 RH-1750 Microprocessor, multichip module (MCM) 55 ns max 8.0 ns to 33 ns 03 RH-1750 Microprocessor, multichip module (MCM) 55 ns max 8.0 ns to 36 ns 8.0 ns to 33 ns 04 RH-1750 Microprocess

10、or, miltichip module (MCM) 50 ns max 1.2.3 Device class desipnator. The device class designator shall be a single letter identifying the product assurance level as follows: Device class Dev ice reau irements documentat ion SIZE 5962-94667 A REVISION LEVEL SHEET 2 M Vendor self-certification to the r

11、equirements for non-JAN class B microcircuits in accordance with 1.2.1 of HIL-STD-883 Q or V Cert i fi c8 t ion and qua 1 if i cat i on to fl1 L-I -38535 1.2.4 Case outline(s1. The case outline(s) shall be as designated in MIL-ST-1835 and as follows: Outline letter Descriptive des iana tor Terminals

12、 Packaae style Y see figure 1 200 Quad flat package 1.2.5 Lead finish. The lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-1-38535 for classes Q and V. Finish letter “X“ shall not be marked on the microcircuit or its packaging. The “X“ designation is for use in s

13、pecifications when lead finishes A, B, and C are considered acceptable and interchangeable without preference. DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-94667 9999996 0073380 958 STANDARD MICROCIRCUIT DUING DEFENS

14、E ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 . SIZE 5962-94667 A REVISION LEVEL SHEET 3 1.3 Absolute maximim ratinus. I/ ZJ Supply voltage range (V ) . -0.5 V dc to +7.0 V dc DC input voltage range y6 N) -0.5 V dc to VDD + 0.5 V dc DC output voltage range (iOUT) . -0.5 V dc to VDD + 0.5 V dc DC in

15、put current (I N) 21 150 mA DC output current (lo r! 4J . 150 mA Power dissipation (P ) Therm1 resistance, junction-to-case (OJc) . 1.0C/!4 Storage tenperature range -65OC to +15OoC Output voltage applie! in high impedance state . -0.5 V dc to VDD + 0.5 V dc Lead temperature (soydering, 5 seconds) .

16、 +27OoC . 4.87 W (peak) Maximum junction temperature (TJ) +150aC 1.4 Recomnended operating conditions. 2/ Supply voltage range (V ) . 4.5 V dc to 5.0 V dc DC input voltage range PB ,) -0.3 V dc to Voo + 0.3 V dc DC output voltage range (QOUT) . -0.3 V dc to Voo + 0.3 V dc OC input current (I N) 21 1

17、10 nd OC output current (10 T) 4/ . *i2 m Case operating temperature range (TC) -55OC to +125OC Capacitive output loa! (CL) s/ . 50 pF 1.5 Diaital loqic testinu for device classes 4 and V. Fault coverage measuremnt of manufacturing logic tests (MIL-STb-883, test method 5012) 98.4 percent 2. APPLICAB

18、LE DOCUMENTS 2.1 Govermnt specification. standards. bulletin, and handbook. Unless otherwise specified, the following specification, standards, bulletin, and handbook of the issue listed in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, f

19、orm a part of this drawing to the extent specified herein. SPEC1 F I CATION CIILITARY HL-H-38534 - Hybrid Microcircuits, General Specification for. MIL-1-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS MILITARY MIL-STD-883 - Test Methods and Procedures for Microelect

20、ronics. MIL-STD-973 - Configuration Management. MIL-STD-i835 - Microcircuit Case Outlines. BULLETIN MI L I TARY MIL-BUL-103 - List of Standardized Military Drawings (SMDIS). /tresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximim levels

21、my degrade performance and affect re1 iabi 1 ity. u All voltages are with respect to V 31 High impedance (input or output lnSShree-state), drfver or receiver type - input, output, or bidirectional. I/ Low impedance (enabled), driver or receiver type = output or bidirectional. s/ f = 20 MHz, no dc lo

22、ad, driver or receiver type = output or bidirectional 12 nd, maximum capacitance scales with inverse of frequency, VDD = 4.5 V dc. terminal and T - -55C to +125T. unless otherwise specified. DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license fr

23、om IHS-,-,-SMD-5762-94667 7999996 0073LBL 894 m STANDARD SIZE MICROCIRCUIT DRAWING A DEFENSE ELECTRONICS SUPPLY CWTEX DAYTON, OHIO 45444 HANDBOOK 5962-94667 REVISION LEVEL SHEET 4 MI L I TARY MIL-HDBK-780 - Standardized Military Drawings. (Copies of the specification, standards, bulletin, and handbo

24、ok required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting activity. ) herein. Unless otherwise specified, the issues of the documents which are DOR adopted are those listed in the issue of the DOD

25、ISS cited in the solicitation. are the issues of the documents cited in the solicitation. 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified Unless otherwise specified, the issues of documents not listed in the WDISS AMERICAN SOCIETY FOR T

26、ESTING AND MATERIALS (ASTM) ASTM Standard Fl192-88 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to the American Society for Testing and Materials, 1916 Race Street

27、, Philadelphia, PA 19103.) ELECTRONICS INDUSTRY ASSOCIATION (EIA) JEDEC Standard No. 17 - A Standarized Test Procedure for the Characterization of Latch-up in CMOS Integrated Circuits. (Applications for copies should be addressed to the Electronics Industries Association, 2001 Pennsylvania Street, N

28、.W., Washington, DC 20006.) (Non-Government standards and other pub1 ications are normally available from the organizations that prepare or distribute the documents, These documents also may be available in or through libraries or other informational services.) herein, the text of this drawing shall

29、 take precedence. 2.3 Order of Precedence. In the event of a conflict between the text of this drawing and the references cited 3. REQUIREMENTS 3.1 Item reauirements. The individual item requirements for device class M shall be in accordance with 1.2.1 Of MIL-STD-883. “Provisions for the use of MIL-

30、STD-883 in conjunction with compliant non-JAN devices“ and as specified herein. The individual item requirements for device classes Q and V shall be in accordance with MIL-1-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The elenent evaluation

31、for passive components shall be in accordance with MIL-H-38534 and as specified herein. The niadification in the QH plan shall not effect the form, fit, or function as described herein. 3.2 Desian, construction, and physical dimensions. The design, construction, and physical dimensions shall be as s

32、pecified in MIL-STD-883 (see 3.1 herein) for device class M and MIL-1-36535 for device classes Q and V and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Termina1 connections. The terminal connections shall be as specified on figure 2. 3.2.3

33、 Block diaqram. The block diagram shall be as specified on figure 3. 3.2.4 Switchinq test circuit and waveforms. The switching test circuit and waveforms shall be as specified on figure 4. 3.2.5 Radiation exposure circuit. The radiation exposure circuit shall be mintained and made available from the

34、 vendor. 3.3 1. Unless otherwise specified herein, the electrlcal performance characteristics and postirradiation parameter limits are as specified in table IA and table I9 and shalt apply over the full case operating temperature range. DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduct

35、ion or networking permitted without license from IHS-,-,-SUD-5962-74667 W 9999996 0073182 720 STANDARD SIZE MICROCIRCUIT DRAWING A DAYTON, OHIO 45444 DEFENSE ELECTRONICS SUPPLY CENTER 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. 3.

36、5 Ilarkinq. The part shall be marked with the PIN listed in 1.2 herein. Harking for device class H shall be in The electrical tests for each subgroup are defined in table IA. accordance with MIL-STD-883 (see 3.1 herein). MIL-BUL-103. Marking for device classes Q and V shall be in accordance with MIL

37、-1-38535. MIL-STO-883 (see 3.1 herein). The certification mark for device classes Q and V shall be a “QML“ or “0“ as required in NIL-1-38535. manufacturer in order to be listed as an approved source of supply in MIL-BUL-103 (see 6.7.2 herein). For device classes 9 and V. a certificate of conpliance

38、shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.7.1 herein). The certificate of conpliance submitted to ESC-EC prior to listing as an approved source of supply for this drawing shall affirm that the mnufacturers product mets, for d

39、evice class H, the requirements of MIL-STD-833 (see 3.1 herein), or for device classes Q and V, the requirements of NIL-1-38535 and the requirements herein. 3.1 herein) or for device classes Q and V in MIL-i-38535 shall be provided with each lot of microcircuits delivered to this drawing, (see 6.2 h

40、erein) involving devices acquired to this drawing is required for any change as defined fn MIL-STD-973. In addition, the manufacturers PIN may also be marked as listed in 3.5.1 Certificationkowliance mark. The conpliance mark for device class M shall be a “C“ as required in 3.6 Certificateof complia

41、nce. For device class M, a certificate of conpliance shall be required from a 3.7 Certificate of conformance. A certificate of conformance as required for device class H in MIL-STD-883 (see 3.8 Notification of chame for device class M. For device class M, notification to DESC-EC of change of product

42、 5962-94667 REVISION LEVEL SHEET 5 DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SflD-5b2-94bb7 m b 0073383 667 m voo = 4.5 v, IOL = 9.0 nJ 1. 21 3 mm SIZE CUIT DRAWING A OHIO 45444 REVISION LEVEL INICS SUPPLY CENTER 5962-9466

43、7 SHEET 6 Device I Limits Units - V Test -55C 5 TC 5 +125C unless otherwise specified subgroups 4.5 v 5 voD I 5.5 v High level input 1 threshold voltage 3J voo = 5.5 v I 1, 2. 3 I Low level input I threshold voltage i/ I lv 2* vDD = 4.5 v _ High level input current I voo = 5.5 v, VIL = vss I 1, 2, 3

44、 Low level input current High level output vo 1 tage NFTDOUTN output only 4J High level output voltage, all outputs except NFTDOUTN 4J Low level output vo 1 tage NFTDOUTN output on 1 y Low level output voltage, all outputs except NFTDOUTN High level output current NFTDOUTN output only 4J Al 1 4.0 Al

45、 1 4.0 Al 1 Al 1 All -9.0 Al 1 -12 Ai 1 Al 1 Al 1 -18 VDD 5.5 V, VOH 4.0 V High level output current al 1 outputs except HFTDOUTN A/ 11 21 3 Low level output current, NFTDOUTN I output only 9.0 Low level output current al 1 outputs except NFTOOUTN 12 Three-state high level output leakage current Thr

46、ee-state low level output leakage current IrA I I Quiescent supply current Operating supply current VDD 5.5 Va fC 16.6 HHZ 1, 2, 3 02, 03 I I See footnotes at end of I S MLCROCIJ DEFENSE ELECTR DAYTON, 3ESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without

47、 license from IHS-,-,-Conditions I/ L/ -55C S TC 5 +125OC unless otherwise specified 4.5 v PLHn (min) tPHLn (maxi PLHn (nax) SIZE 5962-94667 A REVISION LEVEL SHEET 21 L 90% 50% 10% 7 - tri V DD vss VAL I D vss +1.0 v, “ OL PROPAGATION DELAY OF SIGNAL FROH INPUT TO OUTPUT FIGURE 4. Switchinq test cir

48、cuit and waveforms - continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-HCLK TU OUTPUT ENABLE DELAY HCLK : SIGNAL OUT HOLD TIME FOR SIGNAL INPUT FROM HCLK SIGNAL IN VAL I D JUL 94 Provided by IHSNot for ResaleNo reproduction or networking per

49、mitted without license from IHS-,-,-SflD-5962-74667 9999996 0073200 576 STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 HCLK TO OUTPUT ENABLE DELAY c L PZL t PZH VDD HCLK vss - - pi OH SIGNAL OUT HIGH IHPEDANCE VOL SIZE 5962-94667 A REVISION LEVEL SHEET 23 S I GNAt IN HCLK TO OUTPUT DISABLE DELAY DO vss v VOL (aax)+0.25 “J SIGNAL OUT ACTIVE Provi