DLA SMD-5962-94662 REV A-2009 MICROCIRCUIT LINEAR 10-BIT VOLTAGE OUTPUT D A CONVERTER MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Redraw. Update drawing to current requirements. drw 09-11-02 Charles F. Saffle REV SHEET REV SHEET REV STATUS REV A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Sandra Rooney DEFENSE SUPPLY CENTER COLUMBUS COLU

2、MBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Sandra Rooney APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, 10-BIT, VOLTAGE OUTPUT, D/A CONVERTER, MONOLITHIC SILIC

3、ON DRAWING APPROVAL DATE 95-09-05 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-94662 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E026-10 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94662 DEFENSE SUP

4、PLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lea

5、d finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 94662 01 Q J A Federal stock class designator RHA designato

6、r (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator

7、. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type. The device type identifies the circuit function as follows: Device type Generic number Circuit fun

8、ction 01 DAC1054 10-bit voltage-output serial D/A converter with readback 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements f

9、or MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline. The case outline is as designated in MIL-STD-1835 as follows: Outline letter Descriptive designator Terminals Package

10、 style J GDIP1-T24 or CDIP2-T24 24 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD M

11、ICROCIRCUIT DRAWING SIZE A 5962-94662 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage (AVCC, DVCC) 2/ . 7 V Supply voltage difference (AVCC- DVCC) 2/ . 5.5 V Voltage at any pin 2/, 3/ . GND 0.3 V

12、to AVCC/DVCC+ 0.3 V Input current at any pin 2/, 3/ . 5 mA Package input current 2/, 4/ . 30 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 2/, 5/ 950 mW Lead temperature (soldering, 10 seconds) 2/ +300C Junction temperature (TJ) +150C Thermal resistance, junction

13、-to-case (JC). 3.5C/W Thermal resistance, junction-to-ambient (JA) . 41C/W 1.4 Recommended operating conditions. Supply voltage . 4.5 V to 5.5 V Supply voltage difference (AVCC DVCC). 1 V Ambient operating temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, sta

14、ndards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Inte

15、grated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MI

16、L-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict b

17、etween the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Absolute maximum ratings indicate limits beyond which damage t

18、o the device may occur. Operating ratings indicate conditions for which the device is functional, however these ratings do not guarantee specific performance limits. For guaranteed specifications and test conditions, see table I electrical characteristics. The guaranteed specifications apply only fo

19、r the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test conditions. 2/ All voltages are measured with respect to ground, unless otherwise specified. 3/ When the input voltage (VIN) at any pin exceeds the power supply rails (VIN

20、V+) the absolute value of current at that pin should be limited to 5 mA or less. 4/ The sum of the currents at all pins that are driven beyond the power supply voltages should not exceed 30 mA. 5/ The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximu

21、m junction temperature), TJA(package junction to ambient thermal resistance), and TA(ambient temperature). The maximum allowable power dissipation at any temperature is Pdmax = (TJmax TA) / TJAor the number given in the absolute maximum ratings, whichever is lower.Provided by IHSNot for ResaleNo rep

22、roduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94662 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device cl

23、asses Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class

24、M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-

25、PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.3 Electrical performance characteristics and postirradiation parameter limits.

26、 Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups

27、 specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space

28、limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL

29、-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For devi

30、ce classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved

31、 source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or fo

32、r device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits deliver

33、ed to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For de

34、vice class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Devic

35、e class M devices covered by this drawing shall be in microcircuit group number 56 (see MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94662 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS

36、, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C Group A subgroups Device type Limits Unit unless otherwise specified Min Max STATIC CHARACTERISTICS Resolution RES 1, 2, 3 01 10 Bits Monotonicity

37、 MONO 2/ 1, 2, 3 01 10 Bits Integral linearity error ILE 3/ 1, 2, 3 01 -1.0 1.0 LSB Differential linearity error DLE 1, 2, 3 01 -1.0 1.0 LSB Fullscale error FSE 4/ 1, 2, 3 01 -30 30 mV Zero error ZE 5/ 1, 2, 3 01 -25 25 mV Power supply sensitivity PSS 6/ 1, 2, 3 01 -34 dB DIGITAL CHARACTERISTICS Log

38、ical “1” input voltage VIN(1)AVCC= DVCC= 5.5 V 1, 2, 3 01 2.0 V Logical “0” input voltage VIN(0)AVCC= DVCC= 4.5 V 1, 2, 3 01 0.8 V Digital input leakage current IIL1, 2, 3 01 5.0 A Logical “1” output voltage VOUT(1)ISOURCE= 0.8 mA 1, 2, 3 01 2.4 V Logical “0” output voltage VOUT(0)ISINK= 3.2 mA 1, 2

39、, 3 01 0.4 V Interrupt pin output voltage VINT10 k pullup 1, 2, 3 01 0.4 V Supply current ISOutputs unloaded 1, 2, 3 01 20 mA REFERENCE INPUT CHARACTERISTICS Input resistance RREF1, 2, 3 01 4 10 k See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted wit

40、hout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94662 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA +125C Group A subgroups Dev

41、ice type Limits Unit unless otherwise specified Min Max BANDGAP REFERENCE CHARACTERISTICS Output voltage VREF OUT 7/ 1, 2, 3 01 2.597 2.703 V Line regulation VREG4.5 V VCC 5.5 V, IL= 4.5 mA 1, 2, 3 01 5 mV Load regulation VREF/ IL0 IL 4 mA 1, 2, 3 01 10 mV DYNAMIC CHARACTERISTICS Positive voltage ou

42、tput settling time tPSCL= 200 pF 8/ 4, 5, 6 01 3.2 s Negative voltage output settling time tNSCL= 200 pF 8/ 4, 5, 6 01 3.7 s AC ELECTRICAL CHARACTERISTICS Data setup time tDS9, 10, 11 01 15 ns Data hold time tDH9, 10, 11 01 0 ns Control setup time tCS9, 10, 11 01 15 ns Control hold time tCH9, 10, 11

43、 01 0 ns Clock frequency write fWMAX9, 10, 11 01 10 MHz Clock frequency readback fRMAX9, 10, 11 01 5 MHz Minimum clock high time tH9, 10, 11 01 20 ns Minimum clock low time tL9, 10, 11 01 20 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted withou

44、t license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94662 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions 1/ -55C TA +125C Group A subgroups Device

45、 type Limits Unit unless otherwise specified Min Max AC ELECTRICAL CHARACTERISTICS - continued Output Hi-Z to valid 1 fCZ1fCLK= 5 MHz 9, 10, 11 01 70 ns Output Hi-Z to valid 0 fCZ0fCLK= 5 MHz 9, 10, 11 01 70 ns CS to output Hi-Z t1HfCLK= 5 MHz 9, 10, 11 01 150 ns CS to output Hi-Z t1HfCLK= 5 MHz, 10

46、 k with 60 pF 9, 10, 11 01 130 ns 1/ Unless otherwise specified, DC conditions: VREF= 2.65 V, AVCC= DVCC= 5 V, VBIAS= 1.4 V, RL= 2 k, (RLis load resistor on analog output pins VOUT1, VOUT2,VOUT3,and VOUT4), fCLK= 10 MHz. AC conditions: AVCC= DVCC= 5 V, VREF= 2.65 V, VBIAS= 1.4 V, RL= 2 k (RLis load

47、resistor on analog output pins VOUT1, VOUT2,VOUT3,and VOUT4), fCLK= 10 MHz. 2/ A monotonicity of 10 bits means that the output voltage changes in the same direction (or remains constant) for each increase in the input code. 3/ Integral linearity error is the maximum deviation of the output from the

48、line drawn between zero and full-scale (excluding the effects of zero error and full-scale error). 4/ Full-scale error is measured as the deviation from the ideal 2.800 V full-scale output when VREF= 2.650 V and VBIAS= 1.400 V. 5/ Zero error is measured as the deviation from the ideal 0.302 V output when VREF= 2.650 V and VBIAS= 1.400 V, and the digital input word is all zeros. 6/ Power supply sensitivity is the maximum change in the offset error or the full scale error when the power supply differs from its optimum 5 V by up to