DLA SMD-5962-94612 REV H-2006 MICROCIRCUIT HYBRID MEMORY FLASH ERASABLE PROGRAMMABLE READ ONLY MEMORY 512K X 32-BIT《512K X 32位动画可擦除 可程序化只读存储器 数字混合微型电路》.pdf
《DLA SMD-5962-94612 REV H-2006 MICROCIRCUIT HYBRID MEMORY FLASH ERASABLE PROGRAMMABLE READ ONLY MEMORY 512K X 32-BIT《512K X 32位动画可擦除 可程序化只读存储器 数字混合微型电路》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-94612 REV H-2006 MICROCIRCUIT HYBRID MEMORY FLASH ERASABLE PROGRAMMABLE READ ONLY MEMORY 512K X 32-BIT《512K X 32位动画可擦除 可程序化只读存储器 数字混合微型电路》.pdf(41页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED D Corrected dimension D2 for case outlines U, X, and 4. Corrected dimensions D/E and D1/E1 for case outline Y. -sld 98-10-02 K.A. Cottongim E Added case outline 9. Added device type 05. Added vendor cage 0EU86 for device types 01 through 03 in the
2、Standard Microcircuit Drawing Source Approval Bulletin. Figure 1; Made corrections to case outline M. Added thermal resistance ratings for all case outlines to paragraph 1.3 . sld 00-05-11 Raymond Monnin F Added case outline A. Updated drawing to current requirements of MIL-PRF-38534. -sld 03-02-21
3、Raymond Monnin G Added case outline B. Added note to paragraph 1.2.4. -sld 03-10-10 Raymond Monnin H Table I; For COE capacitance test, changed the maximum limit from 32 pF to 36 pF and for the CWE and CAD tests changed the maximum limit from 32 pF to 34 pF for the case outline N only. Updated drawi
4、ng to the current requirements. -sld 06-02-03 Raymond Monnin REV H H SHEET 35 36 REV H H H H H H H H H H H H H H H H H H H H SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV H H H H H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED
5、 BY Steve L. Duncan DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael C. Jones COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil APPROVED BY Kendall A. Cottongim MICROCIRCUIT, HYBRID, MEMORY, FLASH ERASABLE/PROGRAMMABLE READ ONLY MEMORY, 512K x 32-BIT THIS DRAWING IS AVA
6、ILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-07-31 AMSC N/A REVISION LEVEL H SIZE A CAGE CODE 67268 5962-94612 SHEET 1 OF 36 DSCC FORM 2233 APR 97 5962-E251-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license
7、 from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94612 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of
8、 case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 94612 01 H A X Federal RHA Dev
9、ice Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and sha
10、ll be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time 01 F512K32-150 EPROM FLASH, 512K x 32-bit 150 ns 02 F512K32-120 EPROM FL
11、ASH, 512K x 32-bit 120 ns 03 F512K32-090 EPROM FLASH, 512K x 32-bit 90 ns 04 F512K32-070 EPROM FLASH, 512K x 32-bit 70 ns 05 F512K32-060 EPROM FLASH, 512K x 32-bit 60 ns 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All
12、levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, and E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This le
13、vel is intended for use in space applications. H Standard military quality class level. This level is intended for use in applications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In
14、-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer guarantees (but may not test) periodic and conformance inspections (Group A, B, C and D). E Designates devices which are based upon one of the other classes (K, H, or G) with ex
15、ception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document; therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Manufacturer specified quality clas
16、s. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94612 DEFENSE SUPPLY CENTER CO
17、LUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style A See figure 1 68 Co-fired ceramic, single cavity, quad flatpack
18、B See figure 1 68 Co-fired ceramic, single cavity, quad flatpack M 1/ See figure 1 68 Co-fired ceramic, single/dual cavity, quad flatpack N See figure 1 68 Co-fired ceramic, single cavity, quad flatpack, low capacitance T See figure 1 68 Co-fired ceramic, single cavity, low profile,quad flatpack U S
19、ee figure 1 66 Co-fired ceramic, hex-in-line, single cavity, with standoffs X See figure 1 66 Co-fired ceramic, hex-in-line, single cavity, without standoffs Y See figure 1 68 Co-fired ceramic, single cavity, quad flatpack, with tie bars Z See figure 1 68 Co-fired ceramic, single cavity, ultra low p
20、rofile, quad flatpack 4 See figure 1 66 Co-fired ceramic, 1.075“, hex-in-line, single cavity, with standoffs 9 1/ See figure 1 68 Co-fired ceramic, single cavity, ultra low profile, quad flatpack 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings.
21、 2/ Supply voltage range (VCC) 3/ . -2.0 V dc to +7.0 V dc Signal voltage range (VG)(any pin except A9 ) 3/ -2.0 V dc to +7.0 V dc Power dissipation (PD) . 1.32 W Maximum at 5 MHz Thermal resistance, junction-to-case (JC): Case outlines A, M and Z. 10.2C/W Case outlines U and 4 10.63C/W Case outline
22、s X and Y . 6.5C/W Case outline N . 12.36C/W Case outline B and 9 4.57C/W Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds). +300C Data retention 10 years minimum Endurance (write/erase cycles) 10,000 cycles minimum A9 voltage for sector protect (VID) 4/. -2.0 V dc to
23、+14.0 V dc 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input low voltage range (VIL) -0.5 V dc to +0.8 V dc Input high voltage range (VIH) +2.0 V dc to VCC+ 0.5 V dc Case operating temperature range (TC). -55C to +125C A9 voltage for sector protect +11.5 V
24、 dc to +12.5 V dc 1/ Due to the short leads of case outlines M (single cavity) and case outline 9, caution should be taken if the system application is to be used where extreme thermal transitions can occur. Case outline A can be used if longer leads are necessary. 2/ Stresses above the absolute max
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