DLA SMD-5962-94503-1994 MICROCIRCUIT LINEAR 2 GRAY SHADE 160 OUTPUT BINARY COLUMN DRIVER 128 OUTPUT ROW DRIVER MONOLITHIC SILICON TAPE AUTOMATED BOND TECHNOLOGY《带式自动焊接技术 硅单片 2灰色 16.pdf

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1、I SMD-5962-94503 W 9999996 0063389 T49 DESCRIPTION LTR DATE (YR-MO-DA) APPROVED PMIC NIA - STANDARD MICROCIRCUIT DRAWING PREPARED BY Sandra Rooney DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 CHECKED BY THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTHENT OF DE

2、FENSE APPROVED BY Michael A. Frye DRAWING APPROVAL DATE 94-08-12 . REVISION LEVEL AMSC NIA 160 OUTPUT BINARY COLUMN DRIVER/128 OUTPUT ROW DRIVER, MONOLITHIC SILICON, TAPE AUTOMATED BOND TECHNOLOGY SIZE CAGE CODE 5962-94503 A 67268 SHEET 1 OF 24 Monica Poelking I 1 MICROCIRCUIT, LINEAR, 2 GRAY SHADE,

3、 )ESC FORM 193 JUL 94 5962-El 11 -94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1. SCOPE 1.1 Scope. This drawing forms a part of a one part - me pert number documentation system (see 6.6 herein). TWO product assurance classes consisting of milit

4、ary high reliability (device classes P and Ml and space application (device class VI, and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). 1.2.7 of MIL-STD-883, “Provisions for the use of MIL-STD-883 in conjunction with compliant no

5、n-JAN devices“ and Appendix F of MIL-1-38535, “General provisions for TAB aicrocircuits“. Assurance (RHAI levels are reflected in the PIN. Device class M microcircuits represent non-JAN class B microcircuits in accordance with When avai labte, a choice of Radiation Hardness 1.2 m. The PIN shall be a

6、s shown in the following example: 1 1.2.5 Lead finish. The lead finish shall be as specified in Appendix F of NIL-1-38535 for all device classes. 5962 - 94503 I I I “; I T I T I T I Lead Case 1 Devi ce Device i1 Federal RHA stock class designator type class out line finish designator (see 1.2.1) (se

7、e 1.2.2) designator (sec 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device class M RHA marked devices shall meet the MIL-1-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. MIL-1-38535 specified RHA levels and shall be Parked

8、with the appropriate RHA designator. non-RHA device. Device classes Q and V RHA marked devices shall meet the A dash (-) indicates a 1.2.2 Device type(s1. The device typeCs) shall identify the circuit function as follows: Generic number Circuit function Devi ce type o1 02 MRGM32-160A MRGo02-160B 160

9、 output binary column driver 128 output row driver 1.2.3 Device class desianator. The device class designator shall be a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class

10、B microcircuits in accordance with 1.2.1 of MIL-STD-883 and Appendix F of MIL-1-38535. Q or V Certification and qualification to MIL-1-38535 1-2.4 Case outline(s). The case outline(s) shall be as designated herein: Outline letter Descriptive designator Terminals Package style 2 Y See figure 1 See fi

11、gure 1 232 178 Environmentally protected tape Envi ronmentally protected tape automated bond autoaiated bond STANDARD 5962-94503 MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking p

12、ermitted without license from IHS-,-,-1 SMD-5962-94503 m 9999996 00b339L bT7 1.3 Absolute maximum ratinas. I/ STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 Vcc to VEE + 35.0 V dc VDD to Vss - 0.3 V dc Vcc + 0.3 V dc to VEE V dc Vss to VDD - 35.0 V dc 7 V dc to 3

13、V dc 35 V dc VDD + 0.3 V dc to VEE - 0.3 V dc Vcc + 0.3 V dc to Vss - 0.3 V de Vcc + 0.3 V dc to Vss - 0.3 V dc VDD + 0.3 V dc to VEE - 0.3 V dc VDD to VDD - 18 V dc -62C to +150“C t150c +300“ c 375 niki I10 mA SIZE 5962-94503 A REVISION LEVEL SHEET 3 17.9“Cf w 6.7“C I 1.4 Recommended operatinq cond

14、itions. 4.5 V dc to 5.5 V dc t5.0 V dc +IL75 V dc to +15.25 V dc 0.0 V dc O V dc to +5.0 V dc 5 MHz 3.5 MHz (see loading) -15.25 V dc to -14.75 V dc -55OC to +125C DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-2. APPLICABLE DO

15、CUMENTS 2.1 Government specification, standards, bulletin, and handbook. Unless otherwise specified, the following specification, standards, bulletin, and handbook of the issue listed in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, form

16、 a part of this drawing to the extent specified herein. SPECIFICATION MILITARY MIL-1-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS MILITARY STANDARD SIZE MICROCIRCUIT DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL MIL-STD-883 - Test M

17、ethods and Procedures for Microelectronics. I MIL-STD-973 - Configuration Managepent. 5962-94503 SHEET 4 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5762-94503 m 999999b 00b3393 47T = STANDARD SIZE MICROCIRCUIT DRAWING A DEFENSE ELECTRONICS S

18、UPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device class M shall be in accordance with 1.2.1 of !IL-STD-883, “Provisions for the use of HIL-STD-883 in conjunction with compliant non-JAN devices“, Appendix F of MIL- t-3853

19、5 “General provisions for TAB microcircuits“, and as specified herein. levice classes Q and V shall be in accordance with MJL-1-38535, the device manufacturers Quality Management (QM) )tan, and as specified herein. The individual item requirements for 3.2 Desiqn, construction, and physical dimension

20、s. The design, construction, and physical diaensions shall be as :pecified in HIL-STD-883 and Appendix F of MIL-1-38535 (see 3.1 herein) for device class M and MIL-1-38535 for device :lasses Q and V and herein. 5962-94503 SHEET 5 3.2.1 Case outlinds). The case outline(s) shalt be in accordance with

21、1.2.4 herein and figure 1 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Die pad layout. 3.2.4 Die pad functions. 3.2.5 Instruction reqister cades. The die pad layout shall be as specified on figure 3. The die pad functions shall be as specified on figu

22、re 4. The instruction register codes (Built In Self Test (BIST) codes) shall be as specified on figure 5. 3.2.6 Circuit block diaqram and tape master drawing. The circuit block diagram and the tape master drawing shall oe as specified in the acquiring activity document (sec 3.11). 3.3 Electrical per

23、formance characteristics and postirradiation parameter limits. Unless otherwise specified ?erein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test require

24、ments. The electrical test requirements shalt be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. Harking for device class M shall be in In addition, the manufacturers PIN ma

25、y accordance with MIL-STD-883 and Appendix F of MIL-1-38535 (see 3.1 herein). also be marked as Listed in MIL-BUL-103. Marking for device classes Q and v shall be in accordance with Appendix F Of HIL-1-38535. 3.5.1 Certification/compliance mark. The compliance mark for device class M shall be a “C“

26、as required in MIL-STD-883 (see 3.1 herein). in MIL-1-38535. The certification mark for device classes Q and W shall be a “QML“ or “Q“ as required 3.6 Certificate of compliance. For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved

27、 source of supply in MIL-BUL-103 (see 6.7.2 herein). classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.7.1 herein). listing as an approved source of supply for this drawing shall affirm th

28、at the manufacturers product meets, for device class M, the requirements of MIL-STD-883 and Appendix F of HIL-1-38535 (see 3.1 herein), or for device classes Q and V, the rquirements of MIL-1-38535 and the requirements herein. For device The certificate of Compliance submitted to DESC-EC prior to 3.

29、7 Certificate of conformance. A certificate of conformance as required for device class M in MIL-STD-883 (see 3.1 herein) or for device classes Q and V in MIL-1-38535 shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of chanqe for device class M. For device

30、 class M, notification to DESC-EC of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-STD-973. 3.9 Verification and review for device class M. For device class M, DESC, DESCs agent, and the acquiring activity Offshore document

31、ation retain the option to review the manufacturers facility and applicable required documentation. shall be made available onshore at the option of the reviewer. 3.10 IEEE 1149.1 compliance. This device shall be compliant with IEEE 1149.1. DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo repro

32、duction or networking permitted without license from IHS-,-,-SMD-5962-94503 9999996 0063394 - - 306 W 3.11 Acquiring activity document. The aquiring activity document shall be maintained by the manufacturer under document revision level control and shall as a ainiaum contain the requirements of 3.2.

33、5. document, or equivalent, shall apply to the corresponding device typeCs) as follows: The acquiring activity Devi ce type Acquirinq Activity Document nuniber 01, 02 Optical Imaging Systems, Inc (OIS) 100662 4. QUALITY ASSURANCE PROVISIONS 4.1 Samplinq and inspection. For device class M, sampling a

34、nd inspection procedures shall be in accordance with MIL-STD-883 and Appendix F of MIL-1-38535 (see 3.1 herein). procedures shall be in accordance with MIL-1-38535 and the device manufacturers QM plan. For device classes Q and V, sampling and inspection 4.2 Screening. For device class M, screening s

35、hall be in accordance with Appendix F of MIL-1-38535, and shall be conducted on all devices prior to quality conformance inspection. For device classes Q and V, screening shall be in accordance with MIL-1-38535, and shall be conducted on all devices prior to qualification and technology conformance

36、inspection. 4.2.1 Additional criteria for device class M. a. urn-in test, method 1015 of MIL-STD-883. (1) Test condition A, 6, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity up

37、on request. The test circuit shall specify the inputs, outputs, biases, and pouer dissipation, as applicable, in accordance with the intent specified in test method 1015. (2) TA = +12SC, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein. 4.2.2 Addition

38、al criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QH plan in accordance with MIL-1-38535. maintained under document revision level control of the device manufacturers T

39、echnology Review Board (TRB) in accordance with MIL-1-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015.

40、Interim and final electrical test parameters shall be as specified in table 11 herein. Additional screening for device class V beyond the requirements of device class Q shall be as specified in appendix B of MIL-1-38535. The burn-in test circuit shall be b. c. 4.3 Qualification inspection for device

41、 classes Q and V. Qualification inspection for device classes Q and V shall Inspections to be performed shall be those specified in MIL-1-38535 and herein for be in accordance with MIL-1-38535. groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Quality confor

42、mance inspection for device class M shall be in accordance with Appendix F of MIL-1-38535 (see 3.1 herein) and as specified herein. those specified in method 5005 of MIL-STD-883 and herein for groups A, 6, C, D, and E inspections (see 4.4.1 through 4.4.4). groups A, B, C, D, and E inspections and as

43、 specified herein except where option 2 of MIL-1-38535 permits alternate Inspections to be performed for device class i4 shall be Technology conformance inspection for classes Q and V shall be in accordance with MIL-1-38535 including in-line control testing. 4.4.1 Group A inspection. a. b. Tests sha

44、ll be as specified in table II herein. Subgroups 4, 5, 6, 7 and 8 in table I, method 5005 of MIL-STD-883 sha 1 be omitted. 5962-94503 SHEET REVISION LEVEL STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduc

45、tion or networking permitted without license from IHS-,-,-SMD-5762-74503 b 0063395 242 I I l I I vo 1 tage current I I 1, 2, 3 All Logic inputs high level 1 IIH I VIH = Vcc I I 10 PA I I -10 I 1, 2, 3 I All I Logic inputs low teve1 1 IIL I VIL = vss DESC FORM 193A JUL 94 PA 1, 2, 3 ALL 4.5 Logic out

46、put high level I Vm 1 VCC = +5 V de, Im = -1 mA V I 0.5 Logic output Low level I VOL V 12 I I I I 4, 5, 6 All Supply voltage Ivdif I VDD-VEE V I 30 STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE 5962-94503 A REVISION LEVEL SHEET Provided by IHSNot for ResaleN

47、o reproduction or networking permitted without license from IHS-,-,-SMD-5962-9LI503 b 00b339b L 1 TABLE I. Electrical performance characteristics - Continued. I I 1 I I “Ilit Conditions 2/ 1 Group A IDevice I Limits -5SoC 5 Th 5 t12SC 1 subgroups I tYpc I I I unless otherwise specified I I I Min I H

48、ax 1 I 1 I I I I I 1 I 1 I I I 9,10,11 I All I 90 I I ns 1 I I I l I I 9,10,11 I ALL 80 I ns I I 1 I I I I I I I propagation c1-d = 30 PF I 1 I I 1 I I I I 1 1 I I I I I I 1 I I I I I I -1 I I I I I I I I 1 I 7/ 9,10,11 I All I 100 1 I ns I I RESET pulse width I twrst I See figure 6 - I I I I I l I

49、I I I I I I I I I I I I I I I l I I I I I 1 l I I I I I MHz 5 jSY*l Test Clock frequency I CLK - 3/ 9,10,11 All I tr = ti = 5 ns I See fiqure 6 I 1 tr = tf = 5 ns I I I I Lou level pulse width I tul I I I See fisure 6 1 I I I I I I I I ns 90 I 9,10,11 All High level pulse width 1 twh DIOx to CLK Set-up tine 1 tdsu I See figure 6 See figure 6 1 tdiw I see figure 6 ns O 9,10,11 All CLK to DIOx hold time I tdh I 120 1