DLA SMD-5962-92243-1993 MICROCIRCUIT DIGITAL FAST CMOS OCTAL INVERTING BIDIRECTIONAL TRANSCEIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS AND LIMITED OUTPUT VOLTAGE SWING MON.pdf

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1、SMD-5962-92243 9999996 0044460 TT5 - LTR DESCRIPTION DATE (YR-MO-DA) APPROVED * SHEET SHEET 15 16 17 PMIC N/A SIZE A STANDARDIZED MILITARY DRAWING CAGE CODE 5962992243 67268 THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC NIA REV SHEET 123 PREPARED

2、 BY Joseph A. Kerby CHECKED BY Thomas J. Ricciuti APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE 93-06-29 REVISIMI LEVEL DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 MICROCIRCUIT, DIGITAL, FAST CMOS OCTAL INVERTING BIDIRECTIONAL TRANSCEIVER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPU

3、TS AND LIMITED OUTPUT VOLTAGE SWING, MONOLITHIC SILICON 193 JUL 91 DISTRIBUTION STATEMENT A. Approved for public release: distribution is unlimited. 5962-E126-92 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SUD-5762-92243 D 9999996 00444b3 73L = S

4、TANDARDIZED MILITARY DRAWING DEFENSE ELECTRONiCC SUPPLY CENT= DAYTON, OHIO 45444 1. SCOPE Scope. This drawing forms a part of a one part - one part nunber docmntation system (see 6.6 herein). 1.1 Two product assurance classes consisting of military high reliability (device classes B, Q. and M) and s

5、pace application (device classes S and V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, “Provisions for the use of

6、 MIL-STD-883 in conjunction with conpliant non-JAN devices“. When available, a choice of radiation hardness assurance (RHA) levels are reflected in the PIN. SIZE 5962-92243 A REVISION LEVEL SHEET 2 1.2 m. The PIN shall be as shown In the following exanple: i,I i 1_ T 92243 Federal RHA Device Device

7、Case Lead stock class designator typa class outline finish designator (See 1.2.1) (See 1.2.2) designator (See 1.2.4) (See 1.2.5) LA (See 1.2.3) I Drawing mmiber 1.2.1 RHA designator. Device classes M, B, and S RHA marked devices shall nieet the MIL-M-38510 specified RHA levels and shall be marked wi

8、th the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-1-38535 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device tme(s). The device type(s) shall identify the circuit function as

9、follows: Device type Gener i c nuMer Circuit function 01, o2 Oc ta 1 i nvert i ng bid i rec t lona 1 transceiver wi th t hree-s ta t e outputs . TTL conpatible inputs and limited output voltage swing. 03, O4 54FCT640AT Octal inverting bidirectional transceiver with three-state outputs, TTL conpatibl

10、e inputs and limited output voltage swing. 05, 06 54FCT640CT Octal inverting bidirectional transceiver with three-state outputs, TTL conpatible inputs and limited output voltage swing. 1.2.3 Device class desiunator. The device class designator shall be a single letter identifying the product 54FCT64

11、0T assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STO-883 B or S Q or V Certification and qualification to MIL-M-38510 Certification and qualification to MIL-

12、1-38535 1.2.4 Case outlinelsl. The case outline(s) shall be as designated in MIL-STD-1835, and as follows: Outline letter Descriptive des iunator Termina 1 s Packaue style R CDIPl-T2O or CDIP2-T20 20 dual-in-line S GDFP2-F20 or CDFP3-FZO 20 flat package 2 CQCC1-NPO 20 leadless-chip-carrier package 1

13、.2.5 Lead finish. The lead finish shall be as specified in MIL-M-38510 for classes M. B, and S or MIL-1-38535 for classes Q and V. Finish letter “X“ shall not be marked on the microcircuit or its packaging. The “X“ designation is for use in specifications when lead finishes A, B, and C are consldere

14、d acceptable and interchangeable without preference. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-1.3 Absolute maxim rattnqs. 1/ 2/ 31 Supply voltage range (V ) - - - - - - - - - - - - - - - - - DC input voltage range f6 N) - - - - - - - - - - - -

15、 - - - - DC output voltage range (bo T) - - - - - - - - - - - - - - - DC input clamp current (I Ky (V , - -0.5 V) - - - - - - - - - DC output clamp current (1 K) (# - -0.5 V and +7.0 V) - - DC output source current (5 p I- OH6 nd I- OH12 nd rhree-state output leakage current high 3021 TABLE I. Elect

16、rical performance characteristics - continued. IOZH Yg Test conditions unless otherwcge specified -55C s T s +125OC 2/ 4.5 v s 6 5 5.5 v 2.3 For all inputs affecting output under test = 0.8 V Forhl other inputs 2.0 I 1.0 I vIN - v or GND IO, = -30hCd rhree-state output leakage current low 3020 IDzL

17、Ys/ -V orV ;IN - 2!1 V, ,VIL - 0.8 V ForII11 other inhs STANDARDIZED MILITABY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 v - vCc or GND IoL1i 300 JA SIZE 5962-92243 A REVISION LEVEL SHEET 6 For all inputs affecting output under test VIN - V or VIL V - 2% V, V - 0.8 V Forl!ll other

18、inibts VOU1 - vcc 0E-v or V = 0.8 V Forhll other inputs VIN - Vcc or GND VI“ f“2.0 VIL I I Ivour - GND OE - v or vIL = 0.8 V F!: Vcc.; For nonswitching For switching inputs VIN = v or Iinputs OE - T/R = GND f * 2.5 MHz, 5h Duty cycle, I “GND I v,., - 3.4 v Al 1 or GND I in i.5 V 1.2.3 DAYTON, OHIO 4

19、5444 I REVISION LEVEL I SHEET 8 DESC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-59b2-92243 b 0044468 296 Test conditions Device -55C T 5 +125OC 21 type Vcc 4.5 v 5 6 5 5.5 v unless otherwtke specified Test and MIL-STO-883 te

20、st method I/ Group A subgroups Limits 3J Min Max Low level ground bounce noise I 02,04, I 06 Low level ground bounce noise I 700 High level V bounce nSlse I 06 = 0.8 V = 2.0 v VkPify output v0 See 4.4.ld ;IL ;IL 12.0 v 0.8 V 1 ii 15.5 v VQPify output v0 See 4.4.ld CL = 50 pF minimum, I I I 01.02 14.

21、5 V R - soon, High level V bounce nr2s using the alternate test method: the maximum limit is equal to the number of inputs at a high TTL input level times 2.0 nd; and the preferred method and limits are guaranteed. -2.1 V (alternate method). Classes 6, S, Q, and V shall use the preferred method. Whe

22、n the test is SIZE 5962-92243 A REVISION LEVEL SHEET 11 where Icc = Quiescent supply current (any I OH = Duty cycle for TTL inputs at 3.4kL N = Number of TTL inputs at 3.4 V AIcc = Quiescent supply current delta, TTL inputs at 3.4 V I fCCD=-Clock frequency for registered devices (fCp - O for nonregi

23、stered devices) f= input frequency Ni = Number of inputs at fi or TCCH) - Dynamic power supply current caused by an input transition pair (HLH or LHL) This test is for qualification only. Ground and V bounce tests are performed on a non-switching (quiescent) output and are used to measure the magnit

24、ude of inhced noise caused by other similtaneously switching outputs. The test is performed on a low noise bench test fixture. For the device under test, all outputs shall be loaded with 500 il of load resistance and a minimim of 50 pF of load capacitance (see figure 4). Only chip capacitors and res

25、istors shall be used. The output load components shall be located as close as possible to the device outputs. It is suggested, that whenever possible, this distance be kept to less than .25 inches. Decoupling capacitors shall be placed in parallel from V to ground. The values of these decoupling cap

26、acitors shall be determined by the device manufacturer. The i f a 1 MHz. t , tf - 3 ns i1.0 ns. For input signal generatk incapable of maintaining this values of t and t , the 3.0 ns limit may be increased up to 10 ns, as needed, maintaining the l.0 ns tolerance and guaranteeing th6 results at 3.0 n

27、s i1.0 ns: Skew between any two switching inputs signals (tsk): i 250 ps. FIGURE 4. Ground bounce load circuit and waveforms. 3 pF of equivalent capacitance from the test jig and pcobe . STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 ESC FORM 193A JUL 91 I 5962-92

28、243 REVISION LEVEL SHEET 14 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-72243 D 999999b 0044474 59T = I NPUT NONINVERTING OUTPUT o 3v o ov t t - PLHI ENABLE CONTROL I NPUT t - PLH - -. STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SU

29、PPLY CWTW OUTPUT OUTPUT SIZE 5962-92243 A 1 5v 0.3V O OV - bt PLZ - *v cc 1,5v VOL + 0.34 VOL L.4 * GND FIGURE 5. Switchins waveforms and test circuit. o 3v DAYTON, OHIO 45444 I REVISION LEVEL I SHEET I I I 15 -SC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted

30、without license from IHS-,-,-SMD-5962-92243 = 9999996 0044475 426 STIIlJDABDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAWON, OHIO 45444 cc TEST OTHER INPUTS TIED TOV CC OR GND AS REQUIRED VIN SIZE 5962-92243 A REVISION LEVEL SHEET PULSE GENERATOR I I- - “OUT DtV I CE UNDER TEST , - - A

31、 - NOTES: When measuring tpLz and t When measuring t t and t : V test - open The t V t t and t;%hall be measured from 0.3 V to 2.7 V, and 2.7 V to 0.3 V, respectively. - 0.0 V to 3.0 V; PRR d 10 MHz: duty cycle - 50 percent: FIGURE 5. Switchinp waveforms and test circuit - Continued. I I I 16 )ESC F

32、ORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-92243 b 004447b 3b2 m STANJIARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 4. QUALITY ASSURANCE PROVISIONS 4.1 Samplinq and inspection. For device

33、 class M, sampling and inspection procedures shall be in accordance with section 4 of MIL-M-38510 to the extent specified in MIL-STO-883 (see 3.1 herein). For device class 8, sampling and inspection procedures shall be in accordance with MIL-M-38510 and method 5005 of MIL-STD-883, except as modified

34、 herein. For device class S, sampling and inspection procedures shall be in accordance with MIL-M-38510, and methods 5005 and 5007 of MIL-STO-883, except as modified herein. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-1-38535 and the device manufact

35、urers QM plan. conducted on all devices prior to quality conformance inspection. For device classes B and S, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to qualification and quality conformance inspection. For device classes Q and V,

36、screening shall be in accordance with MIL-1-38535. and shall be conducted on all devices prior to qualification and technology conformance inspection. The following additional criteria shall apply. 4.2 Screening. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, a

37、nd shall be 4.2.1 Additional criteria for device classes M. B, and S. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, 8, C or D. For device class M, the test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the pr

38、eparing or acquiring activity upon request. For device classes B and S, the test circuit shall be submitted to the qualifying activity. For device classes M, 6, and S, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent spec

39、ified in test method 1015. (2) TA - +125OC. minimum. (3) For device class M, unless otherwise noted, the requirements for device class B in method 1015 of MIL-STD-883 shall be fol lowed. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test tempe

40、rature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-1-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-1-38535 and s

41、hall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. b. Interim and final electrical test parameters shall be as speci

42、fied in table II herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in appendix B of MIL-1-38535, 4.3 Qualification inspection. 4.3.1 Qualification inspection for device classes B and S. Qualification inspection for device classes B and

43、 S shall be in accordance with MIL-M-38510. UL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5). shall be in accordance with MIL-1-38535. Inspections to be performed shall be those specified in MIL-1-38535 and ierein for groups A, B, C, D. and E inspections (see

44、4.4.1 through 4.4.5). Inspections to be performed shall be those specified in method 5005 of 4.3.2 Qualification inspection for device classes O and V. Qualification inspection for device classes Q and V SIZE 5962-92243 A REVISION LEVEL SHEET Provided by IHSNot for ResaleNo reproduction or networkin

45、g permitted without license from IHS-,-,-SMD-5962-922Y3 9999996 O044477 2T I Est requirements I Interim electrical parameters (see 4.2) Final electrical parameters (see 4.2) iGrzu:E;ts (see 4.4) Group B end-point electrical I parameters (see 4.4) TABLE II. Electrical test requirements. STANDARDIZED

46、MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SIZE 5962-92243 A REVISION LEVEL SHEET 18 IGroup C end-point electrical 1 parameters (see 4.4) Group D end-point electrical parameters (see 4.4) Group E end-point electrical parameters (see 4.4) Subgroups 1 Subgroups (in accordanc

47、e with MIL-STO-883, (in accordance with I MIL-1-38535. table III) I method 5005, table I) Devi ce Devi ce class class l I I I I I1 l1 I1 Il l PDA applies to subgroups 1 and 4 (t.e., ICCT only). 21 PDA applies to subgroups 1. 4 and 7. 4.3.3 Electrostatic discharae sensitivity qualification inspection

48、 . Electrostatic discharge sensitivity (ESDS) testing ;!i. ESDS testing shall be measured only for initial qualification and after process or design changes which may affect ESDS classification. 4.4 Conformance inspection. Quality conformance inspection for device class M shall be in accordance with

49、 MIL-STD-883 (see 3.1 herein) and as specified herein. Quaiity conformance inspection for device classes B and S shall be in accordance with MIL-M-38510 and as specified herein. Inspections to be performed for device classes M, 6, and S shall be those specified in method 5005 of MIL-STO-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5). Technology conformance inspection for clas