DLA SMD-5962-92069 REV A-2012 MICROCIRCUIT MEMORY DIGITAL CMOS 4K X 9 PARALLEL-TO-SERIAL FIFO MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated to current boilerplate requirements. lhl 12-12-03 Charles F. Saffle THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV A A A A A A A A A A A A A A A SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 REV STATUS REV
2、A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Tuan Nguyen DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPAR
3、TMENT OF DEFENSE CHECKED BY Jeff Bowling APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 4K X 9 PARALLEL-TO-SERIAL FIFO, MONOLITHIC SILICON DRAWING APPROVAL DATE 93-08-31 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-92069 SHEET 1 OF 29 DSCC FORM 2233 APR 97 5962-E046-13 Pro
4、vided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92069 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents three product assur
5、ance class levels consisting of space application (device class V), high reliability (device class M and Q). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is r
6、eflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 92069 01 M X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA design
7、ator. Device classes Q, and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) in
8、dicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic 1/ Circuit function Access time 01 4K x 9-bit parallel-to-serial FIFO 120 ns 02 4K x 9-bit parallel-to-serial FIFO 80 ns 03 4K x 9-bit parallel-to-serial FIFO 65 ns 04 4K
9、x 9-bit parallel-to-serial FIFO 50 ns 05 4K x 9-bit parallel-to-serial FIFO 40 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requir
10、ements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designato
11、r Terminals Package style X CDIP2-T28 28 Dual-in-line Y CDFP3-F28 28 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q, and V or MIL-PRF-38535, appendix A for device class M. _ 1/ Generic numbers are listed on the Standard Microcircuit Drawing Bulleti
12、n at the end of this document. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92069 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings
13、. 2/ 3/ Terminal voltage range with respect to ground -0.5 V dc to +7.0 v dc DC output current (IOUT) . 50 mA Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Maximum power dissipation (PD). . 1.0 Wa
14、tt Junction temperature (TJ) . +175C 4/ 1.4 Recommended operating conditions. Supply voltage range (VCC) . 4.5 V dc to 5.5 V dc Supply voltage (VSS) 0.0 V dc High level input voltage (VIN) 2.2 V dc minimum Low level input voltage (VIL) 0.8 v dc maximum 5/ Case operating temperature range (TC) -55C t
15、o +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or c
16、ontract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HA
17、NDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111
18、-5094.) _ 2/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ All voltages referenced to VSS (VSS = ground) unless otherwise specified. 4/ Maximum junction temperature shal
19、l not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5/ Negative undershoots to a minimum of -1.5 V are allowed with a maximum of 10 ns pulse width. Provided by IHSNot for ResaleNo reproduction or networking permitted witho
20、ut license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-92069 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherw
21、ise specified, the issues of the documents are the issues of the documents cited in the solicitation. JEDEC INTERNATIONAL (JEDEC) JESD 78 - IC Latch-Up Test. (Copies of this document are available online at www.jedec.org/ or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suit
22、e 240-S, Arlington, VA 22201). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption ha
23、s been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q, and V shall be in accordance with MIL-PRF-38535 and as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not a
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