DLA SMD-5962-91568 REV B-2013 MICROCIRCUIT MEMORY DIGITAL CMOS ONE-TIME PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R226-93. rp 93-09-20 Michael A. Frye B Update drawing to current MIL-PRF-38535 requirements. lht 13-02-28 Charles F. Saffle REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4

2、 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Rajesh Pithadia DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Kenneth Rice APPROV

3、ED BY Michael Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ONE-TIME PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON DRAWING APPROVAL DATE 92-11-19 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-91568 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E255-13 Provided by IHSNot for ResaleNo reproduction or ne

4、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91568 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents three product assurance class levels consisting of space applicati

5、on (device class V), high reliability (device class M and Q). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as sho

6、wn in the following example: 5962 - 91568 01 M R A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices

7、 meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s).

8、The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time 01 PLOC18G8-20 Generic 20-pin PLD 20 ns 02 PLOC18G8-15 Generic 20-pin PLD 15 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product a

9、ssurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case out

10、line(s). The case outline(s) are as designated in MIL-STD-1835, and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or COFP3-F20 20 Flat pack X CQCC2-N20 20 Square leadless chip carrier 1.2.5 Lead finish. The lead finish

11、is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91568 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-39

12、90 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 2/ 3/ Supply voltage range to ground potential (VCC). -0.5 V dc to +7.0 V dc DC voltage applied to the outputs in the high Z state. -0.5 V dc to +7.0 V dc DC input voltage 3.0 V dc to +7.0 V dc Maximum power dissipation

13、1.0 W 4/ Lead temperature (soldering, 10 seconds). +260C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C Storage temperature range (TSTG) -65C to +150C Temperature under bias. -55C to +125C Output current into outputs (low) 24 mA 1.4 Recommended operating c

14、onditions. Supply voltage range (VCC). +4.5 V dc minimum to +5.5 V dc maximum Ground voltage (GND). 0.0 V dc Input high voltage (VIH). 2.0 V dc minimum 5/ Input low voltage (VIL). 0.8 V dc maximum 5/ Case operating temperature range (TC) -55C to +125C 1.5 Logic testing for device classes Q and V. Fa

15、ult coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) 5/ percent 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless ot

16、herwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-S

17、TD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Sta

18、ndardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ All voltages referenc

19、ed to (VSS). 3/ Must withstand the added PDdue to short circuit test; e.g., ISC. 4/ These are absolute values with respect to device ground. All overshoots due to system or tester noise are included. 5/ Values will be added when they become available. Provided by IHSNot for ResaleNo reproduction or

20、networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91568 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following documents form a part of this document to the extent specifi

21、ed herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. JEDEC INTERNATIONAL (JEDEC) JESD 78 - IC Latch-Up Test. (Copies of this document are available online at www.jedec.org/ or from JEDEC Solid State Technology Association, 3103 North 1

22、0thStreet, Suite 240-S, Arlington, VA 22201). (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of preceden

23、ce. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requiremen

24、ts. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein.

25、 The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-

26、38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table(s). T

27、he truth table(s) shall be as specified on figure 2. 3.2.3.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in screening (see 4.2 herein), or qualification conformance inspection groups A

28、, B, C, or D (see 4.3 herein), the devices shall be programmed by the manufacturer prior to test in a checkerboard or similar pattern (a minimum of 50 percent of the total number of gates programmed). 3.2.3.2 Programmed devices. The truth table for programmed devices shall be as specified by an atta

29、ched altered item drawing. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temp

30、erature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Verification of programmability. When specified, devices shall be verified as programmed (see 4.5 herein)

31、 to the specified pattern. As a minimum, verification shall consist of performing a functional test (subgroup 7) to verify that all bits are in the proper state. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the lot. Provided by I

32、HSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91568 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.6 Processing options. Since the device is capable of being programmed

33、by either the manufacturer or the user to result in a wide variety of configurations; two processing options are provided for selection in the contract. 3.6.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testing as defined in 3.2.3.1 and table IlA. It is r

34、ecommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.6.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions herein, including the requirements of the altered item drawing, shall

35、be satisfied by the manufacturer prior to delivery. 3.7 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has t

36、he option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.7.1 Certi

37、fication/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.8 Certificate of compliance. For device classes Q and V, a certificate o

38、f compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (

39、see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M,

40、the requirements of MIL-PRF-38535, appendix A and herein. 3.9 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing

41、. 3.10 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.11 Verification and review for device class M. For d

42、evice class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.12 Microcircuit group a

43、ssignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 042 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91568 DL

44、A LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device types Limits Unit unless otherwise specified Min Max Output high voltage VOHVCC=

45、 4.5 V, IOH= -2.0 mA, VIN= VIHand VIL1, 2, 3 All 2.4 V Output low voltage VOLVCC= 4.5 V, IOH= 12 mA, VIN= VIHand VIL1, 2, 3 All 0.5 V Input high voltage 1/ VIH1, 2, 3 All 2.0 V Input low voltage 1/ VIL1, 2, 3 All 0.8 V Input leakage current IIXVCC= 5.5 V, VIN= 5.5 V to GND 1, 2, 3 All -10 10 A Outpu

46、t leakage current IOZVCC= 5.5 V, VOUT= 5.5 V to GND 1, 2, 3 All -40 40 A Output short circuit current 2/ 3/ ISCVCC= 5.5 V, VOUT= 0.5 V 1, 2, 3 All -30 -90 mA Power supply current ICCVCC= 5.5 V, IOUT= 0 mA, VIN= GND 1, 2, 3 All 110 mA Input capacitance 3/ CINVCC= 5.0 V, TA= +25C, f = 1 MHz, (see 4.4.

47、1f) 4 All 10 pF Output capacitance 3/ COUT4 All 10 pF Functional tests See 4.4.1c 7, 8 All Input or feedback to nonregistered output tPDSee figures 3 (circuit A) and 4 4/ 9, 10, 11 01 20 ns 02 15 Clock to output tCO9, 10, 11 01 15 ns 02 12 Input to output enable 3/ tEA9, 10, 11 01 20 ns 02 15 See fo

48、otnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91568 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V Group A subgroups Device types