DLA SMD-5962-90989 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS UV ERASABLE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON《硅单块 互补金属氧化物半导体紫外可编程逻辑阵列 数字主储存器微型电路》.pdf
《DLA SMD-5962-90989 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS UV ERASABLE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON《硅单块 互补金属氧化物半导体紫外可编程逻辑阵列 数字主储存器微型电路》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-90989 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS UV ERASABLE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON《硅单块 互补金属氧化物半导体紫外可编程逻辑阵列 数字主储存器微型电路》.pdf(19页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Boilerplate update and part of five year review. Add QP Semiconductor as an approved source of supply. tcr 06-06-20 Raymond Monnin REV SHEET REV A A A A SHEET 15 16 17 18 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8
2、9 10 11 12 13 14 PMIC N/A PREPARED BY Raj Pithadia DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Sandra Rooney COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS
3、UV ERASABLE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-03-01 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-90989 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E513-06 Provided by IHSNot for ResaleNo reproduction or networking pe
4、rmitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90989 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (d
5、evice classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as s
6、hown in the following example: 5962 - 90989 01 Q L X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices
7、 meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s).
8、The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit function tPD01 PLDC20RA10-35 Asynchronous EPLD 35 ns 02 PLDC20RA10-25 Asynchronous EPLD 25 ns 03 PLDC20RA10-20 Asynchronous EPLD 20 ns 1.2.3 Device class designator. The device class designator is a si
9、ngle letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualific
10、ation to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 2/ 3 CQCC1-N28 28 Square leadless chip carrier 2/ 1.2.5 Lead finish. The lead fin
11、ish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. _ 1/ Generic numbers are also listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103 and QML-38535 (see 6
12、.6.2 herein). 2/ Lid shall be transparent to permit ultraviolet light erasure. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90989 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A S
13、HEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 3/ Supply voltage to ground potential -0.5 V dc to +7.0 V dc DC voltage range applied to outputs in high-Z state -0.5 V dc to +7.0 V dc DC input voltage .-3.0 V dc to +7.0 V dc Maximum power dissipation (PD) 4/ 1.0 W Lead temperature (solder
14、ing, 10 seconds).+260C Thermal resistance, junction-to-case (JC) .See MIL-STD-1835 Junction temperature (TJ).+175C Storage temperature range -65C to +150C Temperature under bias -55C to +125C Output current into outputs (low)-16 mA Data retention 10 years (minimum) Endurance25 erase/write cycles (mi
15、nimum) 1.4 Recommended operating conditions. Supply voltage (VCC) +4.5 V dc to +5.5 V dc Ground voltage (GND) .0 V dc Input high voltage (VIH).2.2 V dc minimum Input low voltage (VIL) 0.8 V dc maximum Case operating temperature range (TC).-55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specific
16、ation, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38
17、535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Dr
18、awings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Govern
19、ment publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 Standard
20、 Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) _
21、3/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 4/ Must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or network
22、ing permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90989 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC Standard EIA/JESD 78 - IC Latch-Up Test. (Applications for co
23、pies should be addressed to the Electronics Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be avai
24、lable in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulatio
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