DLA SMD-5962-90744 REV C-2013 MICROCIRCUIT DIGITAL BIPOLAR CMOS 10-BIT BUS MOS MEMORY DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

《DLA SMD-5962-90744 REV C-2013 MICROCIRCUIT DIGITAL BIPOLAR CMOS 10-BIT BUS MOS MEMORY DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-90744 REV C-2013 MICROCIRCUIT DIGITAL BIPOLAR CMOS 10-BIT BUS MOS MEMORY DRIVER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf（13页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R280-92. JAK 92-09-08 Monica L. Poelking B Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. LTG 06-10-11 Thomas M. Hess C Update boilerplate paragraphs to the current MIL-PRF-3853

2、5 requirements. - LTG 13-02-14 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING

3、THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Thomas J. Ricciuti APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, BIPOLAR CMOS, 10-BIT BUS/MOS MEMORY DRIVER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON DRAW

4、ING APPROVAL DATE 90-12-21 REVISION LEVEL C SIZE A CAGE CODE 67268 5962-90744 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E209-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90744 DLA LAND AND MARITIME COLUM

5、BUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q and M) and space application (device class V). A choice of case outlines and lead finishes are available an

6、d are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90744 01 M L A Federal stock class designator RHA designator (see 1.2.1) Device type (

7、see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked

8、 devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54BCT2827A 10-

9、bit bus/mos memory driver with three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements f

10、or MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Termin

11、als Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line K GDFP2-F24 or CDFP3-F24 24 Flat pack 3 CQCC1-N28 28 Square chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for R

12、esaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90744 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc

13、DC input voltage range (VIN) -0.5 V dc to +7.0 V dc Voltage applied to any output in the high state (VOUT) . -0.5 V dc to VCCVoltage applied to any output in the disabled state (VOUT) . -0.5 V dc to +5.5 V dc Input clamp current (IIC) . -30 mA Storage temperature range (TSTG) . -65C to +150C Maximum

14、 power dissipation (PD) . 343 mW 2/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Minimum high level input voltage (VI

15、H) . 2.0 V dc Maximum low level input voltage (VIL) . 0.8 V dc Case operating temperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specifi

16、ed herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard

17、Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksea

18、rch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094). 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this docume

19、nt, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Must be able to w

20、ithstand the additional PDdue to the short circuit test, e.g., IOS. The PDlimit is based upon dc values and is calculated with IOL= 12 mA. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90744 DLA LAND AND MA

21、RITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Managem

22、ent (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, constructio

23、n, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein.

24、3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms

25、and test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the

26、 full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition

27、, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking

28、 for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The co

29、mpliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 he

30、rein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply

31、for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for d

32、evice classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see

33、6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacture

34、rs facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 126 (see MIL-PRF-38535,

35、 appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90744 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristi

36、cs. Test Symbol Test conditions -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V VIH= 2.0 V or VIL= 0.8 V IOH= -1.0 mA 1, 2, 3 All 2.8 V Low level output voltage VOLVCC= 4.5 V VIH= 2.0 V or VIL= 0.8 V IOL= 1.0 mA 1, 2,

37、 3 All 0.5 V IOL= 12 mA 0.8 Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 All -1.2 V High level input current IIH1 VCC = 5.5 V, VIN = 5.5 V 1, 2, 3 All 0.1 mA IIH2VCC= 5.5 V, VIN= 2.7 V 20 A Low level input current IILVCC= 5.5 V, VIN= 0.4 V 1, 2, 3 All -0.2 mA Short-circuit output current 1

38、/ IOSVCC= 5.5 V, VOUT= 2.25 V 1, 2, 3 All -30 -112 mA High level output current IOHVCC= 4.5 V, VOUT= 2.0 V 1, 2, 3 All -30 mA Low level output current IOLVCC= 4.5 V, VOUT= 2.0 V 1, 2, 3 All 50 mA Supply current, outputs low ICCLVCC= 5.5 V Outputs open 1, 2, 3 All 45 mA Supply current, outputs disabl

39、ed ICCZOutputs open 8.0 Off-state output leakage current, high IOZHVCC= 5.5 V VOUT= 2.7 V 1, 2, 3 All 20 A Off-state output leakage current, low IOZL VOUT= 0.4 V -20 Functional tests 2/ See 4.4.1b 7, 8 All Propagation delay time, An to Yn tPLHCL= 50 pF R1 = R2 = 500 See figure 4 VCC= 5.0 V 9 All 1.5

40、 7.5 ns VCC= 4.5 V and 5.5 V 10, 11 1.5 9.0 tPHLVCC = 5.0 V 9 All 1.5 9.0 VCC= 4.5 V and 5.5 V 10, 11 1.5 10.0 Propagation delay time, output enable, G1 or G2 to Yn tPZHVCC = 5.0 V 9 All 2.0 11.5 ns VCC= 4.5 V and 5.5 V 10, 11 2.0 14.0 tPZLVCC = 5.0 V 9 All 2.0 17.5 VCC= 4.5 V and 5.5 V 10, 11 2.0 2

41、3.2 Propagation delay time, output disable, G1 or G2 to Yn tPHZVCC = 5.0 V 9 All 1.0 12.0 ns VCC= 4.5 V and 5.5 V 10, 11 2.0 14.3 tPLZVCC = 5.0 V 9 All 1.0 11.0 VCC= 4.5 V and 5.5 V 10, 11 2.0 11.0 See footnotes on next sheet. Provided by IHSNot for ResaleNo reproduction or networking permitted with

42、out license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90744 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. 1/ The output conditions have been chosen to produce a current that close

43、ly approximates one-half the true short-circuit output current, IOS. Not more than one output should be shorted at one time and the duration of the test condition shall not exceed one second. 2/ Functional tests shall be conducted at input test conditions of 0.4 V VIL 0.8 V and 2.0 V VIH 2.4 V for V

44、CC= 4.5 V and repeated for VCC= 5.5 V. Device type All Case outlines L and K 3 Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 G1 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 GND G2 Y10 Y9 Y8 Y7 Y6 Y5 Y4 Y3 Y2 Y1 VCC- - - - NC G1 A1 A2 A3 A4 A5 NC A6 A7 A

45、8 A9 A10 GND NC G2 Y10 Y9 Y8 Y7 Y6 NC Y5 Y4 Y3 Y2 Y1 VCCNC = No internal connection FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90744 DLA LAND AND MARITIME COLUMBUS, OHIO 4

46、3218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 Inputs Outputs G1 G2 An Yn H X X Z X H X Z L L L L L L H H H = High voltage level L = Low voltage level X = Irrelevant Z = High impedance state FIGURE 2. Truth table. FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or net

47、working permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90744 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking per

48、mitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90744 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. When measuring tPLZ and tPZL: S1 = 7.0 V. When measuring tPLH, tPHL, tPZH, and tPHZ: S1 = Open. 2. The tPZLand tPLZreference waveform is for the output under test with internal conditions such that the output is at VOLexcept when disabled by the output enable control. The tPZHand tPHZreference waveform is for the o