DLA SMD-5962-90696 REV A-2011 MICROCIRCUIT MEMORY DIGITAL CMOS 256 x 4 STATIC RANDOM ACCESS MEMORY (SRAM) WITH SEPARATE I O MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Updated body of drawing to reflect current requirements. - glg 11-11-16 Charles F. Saffle THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHEET A A A REV 15 16 17 SHEET REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7
2、8 9 10 11 12 13 14 PMIC N/A PREPARED BY Jeff Bowling DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS APPROVED BY Michael. A. Frye MICROCIRCUIT, MEMORY, DIGITAL
3、, CMOS, 256 x 4 STATIC RANDOM ACCESS MEMORY (SRAM) WITH SEPARATE I/O, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 93-03-04 AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-90696 SHEET 1 OF 17 DSCC FORM 2233 APR 97 5962-E413-11 Provided by IHSNot for Resale
4、No reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90696 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting
5、 of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1
6、.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example: 5962 - 90696 01 M K A | | | | | | | | | | | | | | | | | | Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (
7、see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are
8、marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit Access time 01 7C123 256 X 4 SRAM Separate I/O 15 ns 02 7C123 256 X 4 SRAM Separate I/O 12 ns
9、 03 7C123 256 X 4 SRAM Separate I/O 10 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JA
10、N class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835, and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-
11、F24 or CDFP3-F24 24 Flat pack L GDIP3-T24 or CDIP4-T24 24 Dual in-line X See figure 1 24 Rectangular leadless chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-
12、,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90696 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage to ground potential (VCC) -0.5 V dc to +7.0 V dc DC voltage range applied to outputs in High-Z state -0.5 V
13、 dc to +7.0 V dc DC input voltage range . -0.5 V dc to +7.0 V dc DC output current 20 mA Maximum power dissipation 1.0 W Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC): Case outlines K and L . See MIL-STD-1835 Case outlines X . 20C/W 2/ Junction temperature
14、(TJ) . +175C Storage temperature range . -65C to +150 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Ground voltage (GND) . 0 V dc Input high voltage (VIH) 2.2 V dc minimum Input low voltage (VIL) 0.8 V dc maximum Case operating temperature range (TC) . -55C
15、to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or
16、contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE H
17、ANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA
18、 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. JEDEC INTERNATIONAL (JEDEC) JEDEC Standard JESD78 -
19、 IC Latch-Up Test. (Applications for copies should be addressed to JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S, Arlington, VA 22201-2107; http:/www.jedec.org.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operatio
20、n at the maximum levels may degrade performance and affect reliability. 2/ When thermal resistance for this case is specified in MIL-STD-1835 that value shall supersede the value indicated herein. 3/ (VIL) negative undershoots of -3.0 V dc are allowed with a pulse width 20 ns. 4/ Values will be adde
21、d when they become available. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90696 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 AMERICAN SOCIETY FOR TESTING
22、AND MATERIALS (ASTM) ASTM Standard F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) induced by Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West
23、Conshohocken, PA 19428-2959; http:/www.astm.org.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a sp
24、ecific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements The individual item requirements for device classes Q, and V shall be in accordance with MIL-PRF-38535 and as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the Q
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