DLA SMD-5962-90651 REV B-2012 MICROCIRCUIT DIGITAL HIGH SPEED CMOS QUAD BUFFER WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Make corrections to logic diagram in figure 3. Add notes to figure 4, switching waveforms and test circuit. Make corrections to table II, electrical test requirements. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout

2、. - LTG 06-01-18 Thomas M. Hess B Correct output current condition for VOHand VOLtests in table I. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - jak 12-02-23 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9

3、10 11 PMIC N/A PREPARED BY Marcia B. Kelleher DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas J. Riccuiti THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH SPE

4、ED CMOS, QUAD BUFFER WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 91-04-24 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-90651 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E181-12 Provided by IHSNot for Resale

5、No reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-90651 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting

6、 of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.

7、2 PIN. The PIN is as shown in the following example: 5962 - 90651 01 M C A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q

8、and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device

9、. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HCT126 Quad buffer with three-state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying the produ

10、ct assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case

11、 outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, a

12、ppendix A for device class M. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current 20 mA DC output current (per pin) 35 mA DC VCCor GN

13、D current (per pin) . 70 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) . 500 mW 2/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C Provided by IHSNot for ResaleNo reproduc

14、tion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-90651 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. 3/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input vo

15、ltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT) 0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC= 4.5 V, 5.5 V 0 to 500 ns 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specificatio

16、n, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specifica

17、tion for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Cop

18、ies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent

19、 specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD-7-A - Standard for Description of 54/74HCXXXX and 54/74HCTXXXX High-Speed CMOS Devices. (Copies of these documents are a

20、vailable online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes prec

21、edence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect rel

22、iability. 2/ For TC= +100C to +125C, derate linearly at 12 mW/C. 3/ Unless otherwise specified, all voltages are referenced to ground. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO

23、43218-3990 SIZE A 5962-90651 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Manageme

24、nt (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction

25、, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein. 3

26、.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms a

27、nd test circuit shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the

28、full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition,

29、 the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking

30、for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The com

31、pliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 her

32、ein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply f

33、or this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for de

34、vice classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime -VA of change of product (see

35、6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufactur

36、ers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 37 (see MIL-PRF-38535,

37、 appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-90651 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristi

38、cs. Test Symbol Test conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVCC= 4.5 V VIN= VIH= 2.0 V or VIL= 0.8 V IOH= -20 A 1, 2, 3 All 4.4 V IOH= -6.0 mA 3.7 Low level output voltage VOLVCC= 4.5 V VIN= VIH= 2.0 V or

39、VIL= 0.8 V IOL= +20 A 1, 2, 3 All 0.1 V IOL= +6.0 mA 0.4 High level input voltage VIH2/ VCC= 4.5 V 1, 2, 3 All 2.0 V Low level input voltage VIL2/ VCC= 4.5 V 2/. 1, 2, 3 All 0.8 V Quiescent supply current ICCVCC= 5.5 V, VIN= VCCor GND IOUT= 0.0 A 1, 2, 3 All 160 A Input leakage current IINVCC= 5.5 V

40、, VIN= VCCor GND 1, 2, 3 All 1.0 A Three-state output current IOZVCC= 5.5 V, VIN= 2.0 V or 0.8 V VOUT= VCCor GND 1, 2, 3 All 10 A Additional quiescent supply current, TTL inputs ICCAny one input VIN= 2.4 V or 0.5 V Other inputs VIN= VCCor GND VCC= 5.5 V 1, 2, 3 All 3.0 mA Input capacitance CINVIN= 0

41、 V, see 4.4.1c 4 All 10 pF Output capacitance COUTVOUT= 0 V See 4.4.1c 4 All 20 pF Power dissipation capacitance 3/ CPDSee 4.4.1c 4 All 45 pF Functional tests See 4.4.1b 7, 8 All Propagation delay time, mA to mY tPHL, tPLHVCC= 4.5 V CL= 50 pF See figure 4 9 All 24 ns 10, 11 36 Propagation delay time

42、, output disable, mOE to mY tPLZ, tPHZ9 All 28 ns 10, 11 42 Propagation delay time, output enable, mOE to mY tPZL, tPZH 9 All 25 ns 10, 11 38 Transition time 4/ tTHL, tTLH9 All 12 ns 10, 11 18 1/ For a power supply of 5.0 V 10%, the worst case output voltages (VOHand VOL) occur for HCT at VCC= 4.5 V

43、. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. 2/ Test is guaranteed if applied as a forcing function for VOHor VOLtests. 3/ Power dissipation capacitance (CPD) determines the dynamic power consumption (PD)

44、and the dynamic current consumption (IS): PD(total) = (CPD+ CL) VCC2f + (VCCx ICC) + (n x d x ICCx VCC) IS= (CPD+ CL) VCC f +ICC+ (n x d x ICC) f is input switching frequency; n is number of inputs switching; d is duty cycle; CLis load capacitance on each output. 4/ This parameter, if not tested, sh

45、all be guaranteed to the limits specified in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-90651 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 Devic

46、e type All Case outline C Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1OE 1A 1Y 2OE 2A 2Y GND 3Y 3A 3OE 4Y 4A 4OE VCCFIGURE 1. Terminal connections. Inputs Outputs mA mOE mY H H H L H L X L Z H = High voltage level L = Low voltage level X = Irrelevant Z = High impedance FIGURE 2

47、. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-90651 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot

48、for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-90651 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CL includes test jig and probe capacitance. 2. Input signal from pulse generator: VIN= 0.0 V to 3.0 V; PRR 1 MHz; ZO= 50; tr= 6.0 ns; tf= 6.0 ns; trand tfshall be measured from 0.3 V to 2.7 V and from 2.7 V to 0.3 V, respectively; duty cycle = 50 percent. 3. The outputs are measured one at