DLA SMD-5962-90543 REV D-2006 MICROCIRCUIT DIGITAL CMOS PROGRAMMABLE DMA CONTROLLER MONOLITHIC SILICON《硅单片 存储票接存取控制器 氧化物半导体数字微型电路》.pdf

《DLA SMD-5962-90543 REV D-2006 MICROCIRCUIT DIGITAL CMOS PROGRAMMABLE DMA CONTROLLER MONOLITHIC SILICON《硅单片 存储票接存取控制器 氧化物半导体数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-90543 REV D-2006 MICROCIRCUIT DIGITAL CMOS PROGRAMMABLE DMA CONTROLLER MONOLITHIC SILICON《硅单片 存储票接存取控制器 氧化物半导体数字微型电路》.pdf（27页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R218-94. 94-07-20 Monica L. Poelking B Changes in accordance with NOR 5962-R068-95. 95-02-17 Monica L. Poelking C Update boilerplate to MIL-PRF-38535 requirements. - CFS 05-08-15 Thomas M. Hess D Correct the ge

2、neric/vendor part numbers for device types 04 and 05. - CFS 06-09-07 Thomas M. Hess REV SHET REV C C C C C C C C C C C C SHEET 15 16 17 18 19 20 21 22 23 24 25 26 REV STATUS REV D D C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED Chris A. Rauch DEFENSE SUPP

3、LY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas M. Hess COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, CMOS, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE

4、 92-09-29 PROGRAMMABLE DMA CONTROLLER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 67268 5962-90543 SHEET 1 OF 26 DSCC FORM 2233 APR 97 5962-E647-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE

5、A 5962-90543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice

6、of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 90543 01 M X A Federal stock class

7、designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appr

8、opriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type

9、Generic number Circuit function 01 82C37A-5 5 MHz programmable DMA controller 02 82C37A 8 MHz programmable DMA controller 03 82C37A-12 12.5 MHz programmable DMA controller 04 82C237 8 MHz programmable DMA controller 05 82C237A-12 12.5 MHz programmable DMA controller 1.2.3 Device class designator. Th

10、e device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A

11、Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Q GDIP1-T40 40 Dual-in-line X CQCC1-N44 44 Square leadless chip carrier 1.2.5 Lead finish

12、. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90543 DEFENSE SUPPLY CENTER COLUM

13、BUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage (referenced to round) (VCC) +8.0 V dc maximum Input, output, or I/O voltage applied range . GND - 0.5 V dc to VCC+ 0.5 V dc Storage temperature range -65C to +150C Power dissi

14、pation (PD) 1.0 W maximum 2/ Lead temperature (soldering, 10 seconds). +275C Junction temperature (JT). +150C maximum Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 1.4 Recommended operating conditions. Case operating temperature range (TC) . -55C to +125C Supply voltage range (VCC) +4

15、.5 V dc to +5.5 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the soli

16、citation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT

17、OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbi

18、ns Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless

19、a specific exemption has been obtained. _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Power dissipation based on package heat transfer limitations, not device power

20、 consumption. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirement

21、s. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. T

22、he individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38

23、535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Functional block diagra

24、m. The functional block diagram shall be as specified on figure 2. 3.2.4 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 3. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herei

25、n, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electric

26、al tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has th

27、e option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certif

28、ication/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of

29、 compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (s

30、ee 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements o

31、f MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification

32、 of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and

33、 the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this dr

34、awing shall be in microcircuit group number 105 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C

35、 SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. See footnotes at end of table. Limits Test Symbol Conditions 1/ -55C TC +125C, unless otherwise specified Group A subgroupsDevice types Min Max Unit Input high voltage VIHVCC= 5.5 V 2.2 V Input low voltage VILVCC= 4.5 V

36、0.8 V CLK input high voltage VIHCVCC= 5.5 V VCC- 0.8 V CLK input low voltage VILCVCC= 4.5 V 0.8 V VCC= 4.5 V 2/ IOH= -2.5 mA 3.0 V High level output voltage VOHVCC= 4.5 V 2/ IOH= -100 A VCC- 0.4 V Low level output voltage VOLVCC= 4.5 V 2/ IOL= 3.2 mA for EOP IOL= 2.5 mA for all other output pins 0.4

37、0 V Input leakage current IIVCC= 5.5 V VIN= VCCor GND -1.0 +1.0 A I/O and output leakage current IOVCC= 5.5 V VOUT= VCCor GND -10 +10 A Standby supply current ICCSBVCC= 5.5 V VIN= VCCor GND, outputs open 10 A Operating supply current ICCOPVCC= 5.5 V, f = maximum VIN= VCCor GND, outputs open 1, 2, 3

38、2 mA/MHz Input capacitance CI25 pF Output capacitance CO40 pFI/O capacitance CI/Of = 1.0 MHz, TC= 25C, All measurements are referenced to device ground. See 4.4.1c 4 25 pF Functional tests VCC= 4.5 v and 5.5 V 3/ See 4.4.1d 7, 8 All All Provided by IHSNot for ResaleNo reproduction or networking perm

39、itted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. See footnotes at end of table. Limits Test Symbol Co

40、nditions 1/ -55C TC +125C, unless otherwise specified Group A subgroupsDevice types Min Max Unit 01 175 02, 04 105 AEN high from CLK low (S1) delay time 1 03, 05 50 ns 01 130 02, 04 80 AEN low from CLK high (S1) delay time 2 03, 05 50 ns 01 90 02, 04 55 ADR active to float delay from CLK high 4/ 3 0

41、3, 05 55 ns 01 120 02, 04 75 READ or WRITE float delay from CLK high 4/ 4 03, 05 50 ns 01 170 02, 04 135 DB active to float delay from CLK high 4/ 5 03, 05 90 ns 01 TCY - 100 02, 04 TCY - 75 ADR from READ high hold time 6 03, 05 TCY - 65 ns DB from ADSTB low hold time 7 All TCL - 18 ns 01 TCY - 65 0

42、2, 04 TCY - 65 ADR from WRITE high hold time 8 03, 05 TCY - 50 ns 01 170 02, 04 105 DACK valid from CLK low delay time 9 03, 05 69 ns 01 170 02, 04 105 EOP high from CLK high delay time 9 03, 05 90 ns 01 100 02, 04 60 EOP low from CLK high delay time 9 03, 05 35 ns 01 110 02, 04 60 ADR stable from C

43、LK high 10 03, 05 50 ns DB to ADSTB low setup time 11 DMA master mode See figure 3. 9, 10, 11 All TCH - 20 ns Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHI

44、O 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. See footnotes at end of table. Limits Test Symbol Conditions 1/ -55C TC +125C, unless otherwise specified Group A subgroupsDevice types Min Max Unit 01 70 02, 04 55 CLK high time

45、(transitions 10 ns) 12 03, 05 30 ns 01 50 02, 04 43 Clock low time (transitions 10 ns) 13 03, 05 30 ns 01 200 02, 04 125 CLK cycle time 14 03, 05 80 ns 01 190 02, 04 130 CLK high to READ or WRITE low delay 15 03, 05 120 ns 01 190 02, 04 115 Read high from CLK high (S4) delay time 16 03, 05 80 ns 01

46、130 02, 04 80 WRITE high from CLK high (S4) delay time 17 03, 05 70 ns 01 120 02, 04 75 HRQ valid from CLK high delay time 18 03, 05 30 ns 01 90 02, 04 90 EOP hold time from CLK low (S2) 19 03, 05 50 ns 01 40 02, 04 25 EOP low to CLK low setup time 20 03, 05 0 ns 01 220 02, 04 135 EOP pulse width hi

47、gh delay time 21 03, 05 50 ns 01 110 02, 04 60 ADR valid delay from CLK high 22 03, 05 50 ns 01 150 02, 04 90 READ or WRITE active from CLK high 23 03, 05 50 ns 01 110 02, 04 60 DB valid delay from CLK high 24 DMA master mode See figure 3. 9, 10, 11 03, 05 45 ns Provided by IHSNot for ResaleNo repro

48、duction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-90543 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. See footnotes at end of table. Limits Test Symbol Conditions 1/ -55C TC +125C, unless otherwise specified Group A subgroupsDevice types Min Max Unit 01 75 02, 04 45 HLDA valid to CLK high setup time 25 03, 05 10 ns Input data from MEMR high hold time 26 All 0 ns 01 155 02, 04 90 Input data from