DLA SMD-5962-89883 REV C-2008 MICROCIRCUIT MEMORY DIGITAL CMOS 8K x 9 STATIC RAM (STANDARD POWER) MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R200-93. 93-07-08 M. A. Frye B Add device type 04. Format update, editorial changes throughout. 95-11-27 M. A. Frye C Updated boilerplate as part of 5 year review. ksr 08-11-19 Robert M. Heber THE ORIGINAL FIRS

2、T PAGE OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Charles Reusing DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles Reusing COLUMBUS, OHIO 43218-39

3、90 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL APPROVED BY Michael A. Frye DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 90-01-26 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 8K x 9 STATIC RAM (STANDARD POWER), MONOLITHIC SILICON AMSC N/A REVISION LEVEL C SI

4、ZE A CAGE CODE 67268 5962-89883 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E024-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89883 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C

5、 SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN shall be as shown in the following example

6、: 5962- 89883 01 X A | | | | | | | | | | | | Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit function Access time 01 1/ 8192 X 9 CMOS SR

7、AM 55 ns 02 1/ 8192 X 9 CMOS SRAM 45 ns 03 1/ 8192 X 9 CMOS SRAM 35 ns 04 1/ 8192 X 9 CMOS SRAM 35 ns 1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835, and as follows: Outline letter Descriptive designator Terminals Package style X CDIP3-T28 or GDIP4-T28 28 dual-in-l

8、ine package Y CDFP4-F28 28 flat package Z CQCC3-N28 28 rectangular chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage to ground potential range . -0.5 V dc to +7.0 V dc DC voltage applied to outputs range

9、 -0.5 V dc to +7.0 V dc DC input voltage range. -0.5 V dc to VCC+0.5 V dc DC output current . 20 mA Storage temperature range -65C to +150C Maximum power dissipation (PD): 2/ 1.0 W Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . Case X, Y, and Z See MIL-STD

10、-1835 Junction Temperature (TJ) +150C 2/ 1.4 Recommended operating conditions. Supply voltage range (VCC) 4.5 V dc to 5.5 V dc High level input voltage range (VIH) 2.4 V dc to VCC+0.5 V dc Low level input low voltage range (VIL) . -0.3 V dc to +0.8 V dc Case operating temperature range (TC) -55C to

11、+125C 1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103. 2/ Maximum junction temperature may be increased to +175C during burn-in and steady state life. Provided by IHSNot for ResaleNo repro

12、duction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89883 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The fol

13、lowing specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing

14、, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcir

15、cuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawin

16、g and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements The individual item requirements shall be in accordance wit

17、h MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may

18、be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not a

19、ffect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535,

20、 appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.4 Die overcoat. Polyimide and sil

21、icone coatings are allowable as an overcoat on the die for alpha particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The freq

22、uency of the internal water vapor testing shall not be decreased unless approved by the preparing activity for class M. The TRB will ascertain the requirements as provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal. 3.3 Electrical performance characteristics. Unl

23、ess otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests

24、 for each subgroup are described in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89883 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.5 M

25、arking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking the entire SMD PIN number is not feasible due to space limitations, the manufacturer ha

26、s the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in acc

27、ordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to

28、 DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provid

29、ed with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent and the acquiring activity retain the option to review the manufacture

30、rs facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening sha

31、ll be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test (method 1015 of MIL-STD-883). (1) Test conditions C or D. The test circuit shall be maintained by the man

32、ufacturer under document revision level control and shall be made available to the preparing or procuring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2

33、) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be

34、in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subg

35、roup 4 (CINand COUTmeasurements) shall be measured only for the initial test and after process or design changes which may affect capacitance. Sample size is fifteen devices with no failures, and all input and output terminals tested. d. Subgroups 7, 8A, and 8B shall include verification of the trut

36、h table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89883 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance character

37、istics. Test Device type Limits Symbol Conditions 4.5 V VCC 5.5 V -55C TC +125C unless otherwise specified Group A subgroupsMin Max Unit High level output voltage VOHVCC= 4.5 V, VIL= 0.8 V, IOH= -4.0 mA, VIH= 2.4 V 1, 2, 3 All 2.4 V Low level output voltage VOLVCC= 5.5 V, VIL= 0.8 V VIH= 2.4 V, IOL=

38、 4.0 mA 1/ 1, 2, 3 All 0.4 V Input load current IIVIN= 0 V and 5.5 V, VCC= 5.5 V 1, 2, 3 All -10 10 A Output current high impedance IOZVIN= 0 V and 5.5 V, VCC= 5.5 V with no load 1, 2, 3 All -10 10 A Operating power supply ICC1W , E = VIL, S = VIH, VCC= VIN= 5.5 V, IO= 0 mA, f = 1/tAVAV, Addresses =

39、 0.8 to 2.4 V 1, 2, 3 All 140 mA Standby supply current, TTL level inputs ICC2f = 0 MHz, all other inputs VILor VIH, VCC= 5.5 V, E VIH1, 2, 3 All 30 mA 01, 02, 03 1.0 Standby supply current (CMOS) ICC3f = 0 MHz, VIN 0.2 V or VIN VCC 0.2 V, VCC= 5.5 V, VCC 0.2 V E 1, 2, 3 04 10 mA Input capacitance C

40、INAll 10 pF Output capacitance COUTVCC= 5.0 V, f = 1.0 MHz, VIN, VOUT =0 V, TA= +25C, See 4.3.1c 4 All 12 pF Functional tests FT See 4.3.1.d 7, 8A, 8B All 01 55 02 45 Read cycle time tAVAV03, 04 35 01 55 02 45 Address valid to data valid tAVQV03, 04 35 Output hold from address change tAVQXSee figure

41、s 3 and 4 1/ 9, 10, 11 All 5.0 ns 01 55 02 45 03 35 Chip enable access time tELQVtSHQV04 35 See notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89883 DEFENSE SUPPLY CENTER COLUMBUS COLU

42、MBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Unit Test Symbol Conditions -55C TC+125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device Types Min Max 01 30 02 25 03 20 Chip enable access tim

43、e tSHQVSee figures 3 and 4 1/ 9, 10, 11 04 25 ns Chip enable to output in low Z tELQXtSHQXSee figures 3 and 4 2/ All 5.0 01 35 02 25 Chip disable to output in high Z tEHQZtSLQZSee figures 3 and 4 2/ 3/ 03, 04 20 01 30 02 25 Output enable low to data valid tGLQVSee figures 3 and 4 1/ 03, 04 20 Output

44、 enable low to low Z tGLQXSee figures 3 and 4 2/ All 5.0 01 30 02 25 Output enable high to high Z tGHQZSee figures 3 and 4 2/ 3/ 03, 04 20 01 55 02 45 Write cycle time tAVAVSee figures 3 and 4 1/ 03, 04 35 01 45 02 40 03 30 Chip enable time to end of write tELWH tELEHSee figures 3 and 4 1/ 04 30 01

45、30 02 25 03 20 Chip enable time to end of write tSHWH tSHSLSee figures 3 and 4 1/ 04 30 See notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89883 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS

46、, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Unit Test Symbol Conditions -55C TC+125C 4.5 V VCC 5.5 V unless otherwise specified Group A subgroups Device Types Min Max 01 50 02 35 Address setup to write end tAVWH

47、See figures 3 and 4 1/ 9, 10, 11 03, 04 30 ns Address hold from write end (write recovery) tWHAXtEHAXtSLAXAll 0 Address setup to write start tAVWLtAVELtAVSHAll 0 01 30 02, 04 25 Write enable pulse width tWLWHtWLEHtWLSL03 20 01 30 02, 04 20 Data setup to write end tDVWHtDVEHtDVSL03 15 Data hold from

48、write end tEHDXtWHDXtSLDXAll 0 01 25 02 20 Write enable to output in high Z tWLQZSee figures 3 and 4 2/ 3/ 03, 04 15 Output active from end of write tWHQXSee figures 3 and 4 2/ All 5.0 1/ Test conditions assume signal transition times of 5.0 ns or less. Timing is referenced at input and output levels of 1.5 V. Output loading is equivalent to the specified IOL/IOHwith a load capacitance of 30 pF (see figure 4). 2/ If not tested, sha