DLA SMD-5962-89843 REV B-2012 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS TRIPLE 3-INPUT NAND GATE TTL COMPATIBLE INPUTS MONOLITHIC SILICON.pdf

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1、 4 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add logic diagram. Add notes to figure 4, switching waveforms and test circuit. Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout jak. 05-10-03 Thomas M. Hess B Correct output current con

2、ditions for VOHand VOLtests in table I. Modify footnote 2 in table I to be more correct. Update the boilerplate to current requirements as specified in MIL-PRF-38535. Editorial changes throughout jak. 12-02-23 Thomas M. Hess REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B OF SHEETS SHEET 1

3、2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Ronald L. Couch DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Monica L. Poelking THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGI

4、TAL, HIGH-SPEED CMOS, TRIPLE 3-INPUT NAND GATE, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-08-18 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89843 SHEET 1 OF 11 DSCC FORM 2233 APR 97 5962-E099-12 Provided by IHSNot for Resal

5、eNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89843 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 complian

6、t, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89843 01 C A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device typ

7、e(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HCT10 Triple 3-input NAND gate, TTL compatible inputs 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator

8、 Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output

9、voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC input diode current (IIK) 20 mA DC output diode current (per pin) (IOK) 20 mA DC drain current (per pin) (IDRAIN) 25 mA DC VCCor GND current (per pin) (ICC, IGND) . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (

10、PD) . 500 mW 3/ Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) +175C 1.4 Recommended operating conditions. 2/ Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput volt

11、age range (VOUT). +0.0 V dc to VCCCase operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VCC= 4.5 V . 0 to 500 ns 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance

12、and affect reliability. 2/ Unless other wise specified, all voltages are referenced to ground. 3/ For TC= +100C to +125C, derate linearly at 8 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89843 DLA L

13、AND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise

14、 specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835

15、 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Stand

16、ardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the soli

17、citation or contract. JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JESD-7-A - Standard for Description of 54/74HCXXXX and 54/74HCTXXXX High-Speed CMOS Devices. (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th

18、 Street, Suite 240S, Arlington, VA 22201.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific

19、exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QM

20、L) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as do

21、cumented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38

22、535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 her

23、ein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching wavef

24、orms and test circuit shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89843 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.

25、3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroup

26、s specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where

27、marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, append

28、ix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an appr

29、oved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.

30、7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affect

31、s this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the revi

32、ewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89843 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test

33、 Symbol Conditions 1/ -55C TC +125C unless otherwise specified VCCGroup A subgroups Limits Unit Min Max High level output voltage VOHVIN= 2.0 V or 0.8 V IOH= -20 A 4.5 V 1, 2, 3 4.4 V IOH= -4 mA 3.7 Low level output voltage VOLVIN= 2.0 V or 0.8 V IOL= +20 A 4.5 V 1, 2, 3 0.1 V IOL= +4 mA 0.4 High le

34、vel input voltage VIH2/ 4.5 V 1, 2, 3 2.0 V Low level input voltage VIL2/ 4.5 V 1, 2, 3 0.8 V Input capacitance CINVIN= 0 V, see 4.3.1c, TC= +25C 4 10 pF Quiescent supply current ICCVIN= VCCor GND, IOUT= 0.0 A 5.5 V 1, 2, 3 40 A Input leakage current IINVIN= VCCor GND 5.5 V 1, 2, 3 1.0 A Additional

35、quiescent supply current, TTL input levels ICCAny one input, VIN = 2.4 V Other inputs, VIN= VCCor GND IOUT= 0.0 A 5.5 V 1, 2, 3 294 A Functional tests See 4.3.1d 7, 8 Propagation delay time, An, Bn, or Cn to Yn tPHL, tPLHCL= 50 pF See figure 4 4.5 V 9 24 ns 10, 11 36 Output transition time tTLH, tTH

36、L3/ 4.5 V 9 15 ns 10, 11 22 1/ For power supply of 5 V 10 percent, the worst case output voltages (VOHand VOL) occur for HCT at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. 2/ VIHand VILtests are guar

37、anteed if not tested but shall be applied as forcing functions for VOHor VOLtests. 3/ Transition times (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICRO

38、CIRCUIT DRAWING SIZE A 5962-89843 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outline C Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 A1 B1 A2 B2 C2 Y2 GND Y3 A3 B3 C3 Y1 C1 VCCFIGURE 1. Terminal connections. P

39、rovided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89843 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Inputs Outputs An Bn Cn Yn L L L H L L H H L H L H L H H H H

40、 L L H H L H H H H L H H H H L L = Low voltage level H = High voltage level FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89843 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISIO

41、N LEVEL B SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89843 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 A

42、PR 97 NOTES: 1. CL = 50 pF or equivalent, includes test jig and probe capacitance. 2. Input signal from pulse generator: VIN= 0.0 V to 3.0 V; PRR 1 MHz; ZO= 50; tr= 6.0 ns; tf= 6.0 ns; trand tfshall be measured from 0.3 V to 2.7 V and from 2.7 V to 0.3 V, respectively; duty cycle = 50 percent. 3. Th

43、e outputs are measured one at a time with one transition per measurement. FIGURE 4. Switching waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89843 DLA LAND AND MARITIME COLUMBUS,

44、OHIO 43218-3990 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conduct

45、ed on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made av

46、ailable to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameter

47、s shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883, method 5005, table I) Interim el

48、ectrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 7, 8, 9 Group A test requirements (method 5005) 1, 2, 3, 4, 7, 8, 9, 10*, 11* Groups C and D end-point electrical parameters (method 5005) 1, 2, 3 * PDA applies to subgroup 1. * Subgroups 10 and 11, if not tested, shall be guaranteed to the specified limits in table I. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 inc