DLA SMD-5962-89692 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 16K X 4 STATIC RAM (SRAM) MONOLITHIC SILICON《硅单片 16K X 4 静态随机存取存储器 氧化物半导体数字记忆微型电路》.pdf

《DLA SMD-5962-89692 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 16K X 4 STATIC RAM (SRAM) MONOLITHIC SILICON《硅单片 16K X 4 静态随机存取存储器 氧化物半导体数字记忆微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-89692 REV A-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 16K X 4 STATIC RAM (SRAM) MONOLITHIC SILICON《硅单片 16K X 4 静态随机存取存储器 氧化物半导体数字记忆微型电路》.pdf（20页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Boilerplate update, part of 5 year review. ksr 06-10-31 Raymond Monnin THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV A A A A SHEET 15 16 17 18 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9

2、 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth S. Rice DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles Reusing COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye AND AGENCIES OF THE DEPARTMEN

3、T OF DEFENSE DRAWING APPROVAL DATE 89-12-12 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 16K X 4 STATIC RAM (SRAM), MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-89692 SHEET 1 OF 18 DSCC FORM 2233 APR 97 5962-E010-07 .Provided by IHSNot for ResaleNo reproduction or networking perm

4、itted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89692 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B m

5、icrocircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89692 01 X A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) iden

6、tify the circuit function as follows: Device type Generic number 1/ Circuit function Acess time 01 16K X 4 static ram 25 ns (data retention) 02 “ 25 ns 03 “ 20 ns (data retention) 04 “ 20 ns 05 “ 15 ns (data retention) 06 “ 15 ns 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-ST

7、D-1835 and as follows: Outline letter Descriptive designator Terminals Package style K GDFP2-F24 or CDFP3-F24 24 flat package X See figure 1 22 dual-in-line package Y See figure 1 22 dual-in-line package Z See figure 1 22 leadless chip carrier package 1.2.3 Lead finish. The lead finish is as specifi

8、ed in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range (VCC) - -0.5 V dc to +7.0 V dc 2/ DC output current - 20 mA Ambient storage temperature - -65C to +150C Temperature under bias- -55C to +125C Thermal resistance, junction-to-case (JC):. Cases K- See MIL-STD-1835 Case

9、 X and Y - 28C/W Case Z - 22C/W Power dissipation, (PD) - 1.0 W Lead temperature (soldering, 10 seconds) - +260C 1.4 Recommended operating conditions. Supply voltage (VCC) - +4.5 V dc to +5.5 V dc 2/ Ground voltage (VSS)- 0 V dc Input high voltage (VIH) - +2.2 V dc to VCC+ 0.5 V dc Input low voltage

10、 (VIL) - -0.5 V dc to 0.8 V dc 3/ Operating case temperature range (TC)- -55C to +125C 1/ Generic numbers are listed on the Standardized Military Drawing Source Approval Bulletin at the end of this document and will also be listed in MIL-HDBK-103. 2/ All voltages referenced to VSS. 3/ VILnegative un

11、dershoots to a minimum of -2.0 V dc are allowed with a maximum 20 ns pulse width. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89692 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL

12、A SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited

13、in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.

14、DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk

15、, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulati

16、ons unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Ma

17、nufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-3853

18、5. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in acco

19、rdance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections

20、 shall be as specified on figure 2. 3.2.2 Truth table. The truth table shall be as specified on figure 3. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein and figure 1. 3.2.4 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alph

21、a particle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL-PRF-38535) shall be subjected to and pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing shall not be decrease

22、d unless approved by the preparing activity for class M. The TRB will ascertain the requirements as provided by MIL-PRF-38535 for classes Q and V. Samples may be pulled any time after seal. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance char

23、acteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot

24、 for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89692 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol

25、Conditions Group A Device Unit -55C TC +125C subgroups type Min Max VSS= 0 V, 4.5 V VCC 5.5 V unless otherwise specified Input leakage current ILIVCC= max, VIN= GND to VCC 1,2,3 All 10 A Output leakage ILOVCC= max; 1,2,3 All 10 A current VOUT= GND to VCC, CE VIH, WE VIL Output low voltage VOL VCC= 4

26、.5 V, IOL= 8 mA, 1,2,3 All 0.4 V VIL= 0.8 V, VIH= 2.2 V Output high voltage VOHVCC= 4.5 V, IOH= -4.0 mA, 1,2,3 All 2.4 V VIL= 0.8 V, VIH= 2.2 V Operating supply current ICC1CE = VIL, outputs open, 1,2,3 01, 03 120 mA VCC= max, f = 1/tAVAX 02, 04 130 05, 06 150 Standby power supply ICC2CE VIH, output

27、s open, 1,2,3 01,03, mA current (TTL) VCC= max, f = 0 MHz 05 20 02,04, 06 50 Standby power supply ICC3VCC+0.2 V CE VCC- 0.2 V, 1,2,3 01,03, 5 mA current (CMOS) outputs open, 05 VCC+0.2 V VIN VCC- 0.2 V 02,04, or +0.2 V VIN -0.2 V, 06 20 f = 0 Mhz Data retention ICC4 current VCC= VDR 1,2,3 01,03, = 2

28、.0 V 05 600 A Input capacitance CINVI= 0 V, 4 All 10 pF 1/ f = 1 Mhz, TA= +25C, see 4.3.1c Output capacitance COUTVO= 0 V, 4 All 10 pF 1/ f = 1 Mhz, TA= +25C, see 4.3.1c See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S

29、TANDARD MICROCIRCUIT DRAWING SIZE A 5962-89692 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 2/ Group A Device Unit -55C TC +125C subgroups type Min Ma

30、x VSS= 0 V, 4.5 V VCC 5.5 V unless otherwise specified See figure 4 Read cycle time tAVAX 9, 10 11 01,02 25 ns 03,04 20 05,06 15 Address cycle time tAVQV 9, 10, 11 01,02 25 ns 03,04 20 05,06 15 Chip enable access time tELQV 9, 10, 11 01,02 25 ns 03,04 20 05,06 15 Output hold from address tAVQX 9, 10

31、, 11 01-04 3 ns change 05,06 2 Chip select to output tELQX 9, 10, 11 01-04 3 ns in low Z 1/ 3/ 05,06 2 Chip select to output tEHQZ 9, 10, 11 All 15 ns in high Z 1/ 3/ Write enable to output tWLQZ 9, 10, 11 01,02 15 ns in high Z 1/ 3/ 03,04 12 05,06 10 Data valid to end of write tDVWH 9, 10, 11 01,02

32、 15 ns 03,04 12 05,06 10 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89692 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 A

33、PR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 2/ Group A Device Unit -55C TC +125C subgroups type Min Max VSS= 0 V, 4.5 V VCC 5.5 V unless otherwise specified Data hold time tWHDXSee figure 4 9, 10, 11 All 0 ns Output active from end tWHQV 9, 10, 11

34、 All 3 ns of write 1/ 3/ Write cycle time tAVAV 9, 10, 11 01,02 25 ns 03,04 20 05,06 15 Chip select to end of write tELWH 9, 10, 11 01,02 20 ns 03,04 17 05,06 14 Address valid to end of tAVWH 9, 10, 11 01,02 20 ns write 03,04 17 05,06 14 Address setup time tAVWL 9, 10, 11 All 0 ns Write pulse width

35、tWLWH 9, 10, 11 01,02 20 ns 03,04 17 05,06 14 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89692 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions 2/ Group A Device Unit -55C TC +125C subgroups type Min Max VSS= 0 V, 4.5 V VCC 5.5 V unless otherwise specified Write recovery time tEHAXSee figure 4 9, 10, 11 01-04 5 ns 05,06 3