DLA SMD-5962-89655 REV B-2004 MICROCIRCUIT LINEAR 12-BIT CMOS HIGH-SPEED A D CONVERTER MONOLITHIC SILICON《硅单片 12位高速交流 直流转变器 氧化物半导体线性微型电路》.pdf

《DLA SMD-5962-89655 REV B-2004 MICROCIRCUIT LINEAR 12-BIT CMOS HIGH-SPEED A D CONVERTER MONOLITHIC SILICON《硅单片 12位高速交流 直流转变器 氧化物半导体线性微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-89655 REV B-2004 MICROCIRCUIT LINEAR 12-BIT CMOS HIGH-SPEED A D CONVERTER MONOLITHIC SILICON《硅单片 12位高速交流 直流转变器 氧化物半导体线性微型电路》.pdf（14页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Drawing updated to reflect current requirements. -rrp 02-10-17 R. MONNIN B Corrections to table I. Editorial changes throughout. drw 04-06-30 R. MONNIN THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHET REV SHET REV STATUS REV B

2、 B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Rick C. Officer DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles E. Besore COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS

3、APPROVED BY Michael A. Frye MICROCIRCUIT, LINEAR, 12-BIT CMOS, HIGH-SPEED A/D CONVERTER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-12-13 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89655 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E334-04 .Provided

4、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89655 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requireme

5、nts for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89655 01 L A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish

6、(see 1.2.3) 1.2.1 Device types. The device types identify the circuit function as follows: Device type Generic number Circuit function Linearity Conversion time (max) 01 AD7672TQ10 12-bit CMOS ADC 11-bit 10 s 02 AD7672UQ10 12-bit CMOS ADC 12-bit 10 s 03 AD7672TQ05 12-bit CMOS ADC 11-bit 5.0 s 04 AD7

7、672UQ05 12-bit CMOS ADC 12-bit 5.0 s 1.2.2 Case outline. The case outline are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style L GDIP3-T24 or CDIP4-T24 24 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appe

8、ndix A. 1.3 Absolute maximum ratings. VDDto DGND -0.3 V dc to +7.0 V dc VSSto DGND . +0.3 V dc to -17 V dc AGND to DGND -0.3 V dc to VDD+ 0.3 V dc AIN1, AIN2to AGND -15 V dc to +15 V dc Digital input voltage to DGND: (CLKIN, CS , RD ) -0.3 V dc to VDD+ 0.3 V dc Digital output voltage to DGND: (DB11-

9、 DB0, BUSY , CLKOUT) -0.3 V dc to VDD+ 0.3 V dc Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) +300C Power dissipation (PD) TA 75C 1.0 W 1/ Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C 1/ Derate above TA= +75C at 10 mW

10、/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89655 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Operatin

11、g voltage range: Positive supply (VDD) . +4.75 V dc to +5.25 V dc Negative supply (VSS) . -10.8 V dc to -13.2 V dc Clock frequency (fCLK): Device types 01 and 02 . 1.25 MHz Device types 03 and 04 . 2.5 MHz Reference input voltage -5.0 V dc Analog input voltage ranges (AIN): (applies to slow memory m

12、ode) . 0 to +5.0 V dc 0 to +10 V dc and 5.0 V dc Operating ambient temperature range (TA) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Un

13、less otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits

14、. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil;quicksearch/ or w

15、ww.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing

16、in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89655 DEFENSE SUPPLY CENTER COLUMBUS COLUMB

17、US, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced b

18、y a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance w

19、ith MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certificat

20、ion mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlin

21、es shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply o

22、ver the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix

23、 A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103 (see 6.6 herein). For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not m

24、arking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-

25、38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to lis

26、ting as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of m

27、icrocircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required in accordance with MIL-PRF-38535, appendix A. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and

28、applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89655 DEFENSE SUPPLY CENTER COLUMBUS CO

29、LUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxDigital input low voltage VINLCS , RD , CLKIN, VDD= 4.75 V, VSS=

30、 -12 V 1, 2, 3 All 0.8 V Digital input high voltage VINHCS , RD , CLKIN, VDD= 4.75 V, VSS= -12 V 1, 2, 3 All 2.4 V Analog input current (unipolar) IIN1Input ranges = 0 V to 5.0 V or 0 V to 10 V 1, 2, 3 All 3.5 mA Analog input current (bipolar) IIN2Input range = 5.0 V 1, 2, 3 All 1.75 mA Reference in

31、put current IREFVDD= 5.0 V, VSS= -12 V 1, 2, 3 All -3.0 A CS , RD 10 Digital input current IINVDD= 5.25 V, VSS= -12 V, AIN= 0 to VDDCLKIN1, 2, 3 All 20 A Digital output low voltage VOLDB11 DB0, BUSY , CLKOUT, VDD= 4.75 V, VSS= -12 V,ISINK= 1.6 mA 1, 2, 3 All 0.4 V Digital output high voltage VOHDB11

32、 DB0, BUSY , CLKOUT, VDD= 4.75 V, VSS= -12 V, ISOURCE= 200 A 1, 2, 3 All 4.0 V Floating state leakage current ILKGDB11 DB0, VSS= -12 V, VDD= 5.25 V 1, 2, 3 All 10 A 1, 2, 3 01,03 1.0 1 1.0 Integral linearity error LE VDD= 5.0 V, VSS= -12 V, Input range = 5.0 V 2, 3, 12 02,04 0.5 LSB Differential lin

33、earity error DLE VDD= 5.0 V, VSS= -12 V 1, 2, 3 All 0.9 LSB Power supply current from VDDIDDCS = RD = BUSY = HIGH, VDD= 5.25 V, VSS= -13.2V, AIN1= 5.0 V = AIN21, 2, 3 All 7.0 mA Power supply current from VSSISSCS = RD = BUSY = HIGH, VDD= 5.25 V, VSS= -13.2V, AIN1= 5.0 V = AIN21, 2, 3 All -12 mA See

34、footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89655 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical per

35、formance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max1 All 5.0 01,03 6.0 2, 3 02,04 4.0 Unipolar offset error VOSVDD= 5.0 V, VSS= -12 V, Input range = 0 V to 5.0 V or 0 V to 10 V 12 02,04 3.0 LSB 1 All

36、 5.0 01,03 7.0 2, 3 02,04 6.0 Unipolar full scale error AE VDD= 5.0 V, VSS= -12 V, Input range = 0 V to 5.0 V or 0 V to 10 V 12 02,04 3.0 LSB 1 All 5.0 01,03 6.0 2, 3 02,04 4.0 Bipolar zero error BPZEVDD= 5.0 V, VSS= -12 V, Input range = 5.0 V 12 02,04 3.0 LSB 1 All 5.0 01,03 7.0 2, 3 02,04 6.0 Bipo

37、lar gain error BPAEVDD= 5.0 V, VSS= -12 V, Input range = 5.0 V 12 02,04 4.0 LSB Digital input capacitance 2/ CINCS , RD , CLKIN, VDD= 4.75 V, VSS= -12 V, TA= +25C 4 All 10 pF Floating state output 2/ capacitance COUTTA= +25C 4 All 15 pF 01,02 10 Conversion time using synchronous clock tCONV1See figu

38、res 2 and 3 9, 10, 11 03,04 5.0 s 01,02 9.6 10.4 Conversion time using asynchronous clock tCONV21/ 9, 10, 11 03,04 4.8 5.2 s CS to RD setup time t1See figures 4 and 5 3/ 9, 10, 11 All 0 ns 9 190 RD to BUSY propagation delay t2See figures 2 and 3 3/ 10, 11 All 270 ns 9 110 CL= 60 pF 10, 11 150 9 125

39、Data access time after RD t3See figures 2, 3, and 4 4/ CL= 100 pF 10, 11 All 170 ns RD pulse width t4See figures 2 and 3 3/ 9, 10, 11 All t3ns CS to RD hold time t5See figures 2 and 3 3/ 9, 10, 11 All 0 ns 9 70 Data setup time after BUSY t6CL = 60 pF, 3/ 4/ See figures 2, 3, and 4 10, 11 All 100 ns

40、See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89655 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical

41、 performance characteristics Continued. Test Symbol Conditions 1/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max9 28 83 Bus relinquish time t7See figures 2, 3, and 5 5/ 10, 11 All 20 90 ns Delay between successive read operations t83/ 9, 10, 11 All 200 ns

42、1/ Conversion time using asynchronous clock is measured by setting the clock frequency at the appropriate value (see 1.4) and checking all remaining tested specifications. 2/ If not tested, shall be guaranteed to the limits specified in table I. 3/ All input control signals are specified with tr= tf

43、= 5 ns (10% to 90% of +5.0 V) and timed from a voltage level of 1.6 V. Time t6and t8are measured only for the initial test and after process or design changes which may affect switching parameters. 4/ Time t3and t6are measured with the load circuits of figure 2 and defined as the time required for a

44、n output to cross 0.8 V or 2.4 V. 5/ Time t7is defined as the time required for the data lines to change 0.5 V when loaded with the circuits of figure 3. t7is tested at +25C, with CL= 60 pF. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection. Sampling and inspection procedures shall be in a

45、ccordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Te

46、st condition A, B, C or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable,

47、 in accordance with the intent specified in test method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer

48、. c. Subgroup 12 test is used for grading and part selection at TA= +25C and is not included in PDA calculations. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89655 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Device types 01, 02, 03, and 04 Case outline L Terminal number Terminal symbol 1 AIN12 VREF3 AGND 4 DB11(MSB) 5 DB106 DB97 DB88 DB79 DB610 DB511 DB412 DGND 13