DLA SMD-5962-89532 REV D-2012 MICROCIRCUIT DIGITAL CMOS DUAL ASYNCHRONOUS RECEIVER TRANSMITTER MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add case outline Y, add vendor CAGE code 18324. 90-03-08 W. Heckman B Corrected supply voltage in 1.3 absolute max ratings. Technical changes to table I. Add new footnote 3/ to table I. Editorial changes throughout. 92-03-16 Monica Poelking C Upd

2、ate boilerplate to current MIL-PRF-38535 requirements. - CFS 06-02-08 Thomas M. Hess D Update boilerplate to current MIL-PRF-38535 requirements. - jak 12-02-15 Thomas M. Hess REV SHEET REV D D D D D D D D D D D D D D D D D D D D SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV S

3、TATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Todd D. Creek DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin THIS DRAWING IS AVAILABLE FOR USE BY ALL DEP

4、ARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, CMOS, DUAL ASYNCHRONOUS RECEIVER/TRANSMITTER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-04-04 AMSC N/A REVISION LEVEL SIZE A CAGE CODE 67268 5962-89532 D SHEET 1 OF 34 DSCC FORM 2233 APR 97 5962-E

5、180-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-89532 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device re

6、quirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-89532 01 Q X Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead

7、finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 88C681, 2692 Dual asynchronous receiver/transmitter (DUART) 02 88C681, 2692 Dual asynchronous receiver/transmitter (DUART) with 7-bit input and 8-bit o

8、utput ports 03 68C681 Dual asynchronous receiver/transmitter (DUART) 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Q GDIP1-T40 or CDIP2-T40 40 Dual-in-line X GDIP1-T28 or CDIP2-T28 28 Dual-in

9、-line U CQCC1-N44 44 Square leadless chip carrier Y See figure 1. 52 Flat pack 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc to +7.0 V dc Storage temperature range . -65C to +150C Maximum power dissipatio

10、n (PD) 1.0 W Lead temperature (soldering, 5 seconds) +300C Maximum junction temperature (TJ) +175C Thermal resistance, junction-to-case (JC): Cases X, Q, and U . See MIL-STD-1835 Case Y . 20C/W 1.4 Recommended operating conditions. Supply voltage (VCC) . 4.5 V dc to 5.5 V dc Minimum high level input

11、 voltage (VIH): Logic inputs 2.0 V dc X1/CLK input 4.0 V dc Maximum low level input voltage (VIL) . 0.8 V dc Maximum high level output current (IOH) . -400 A Maximum low level output current (IOL) . 2.4 mA Case operating temperature range (TC) -55C to +125C Provided by IHSNot for ResaleNo reproducti

12、on or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-89532 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specifi

13、cation, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Spec

14、ification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings.

15、 (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the ref

16、erences cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38

17、535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed

18、 as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form,

19、fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction,

20、and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Functional block diagram.

21、 The functional block diagram shall be as specified on figure 3. 3.2.4 Timing waveforms and test circuits. The timing waveforms and test circuits shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristi

22、cs are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall

23、be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not

24、 marking the “5962-“ on the device. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-89532 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 3.5.1 Certification/com

25、pliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 C

26、ertificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply sha

27、ll affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.

28、3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers faci

29、lity and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218

30、-3990 SIZE A 5962-89532 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ -55C TC +125C 4.5 V dc VCC 5.5 V dc unless otherwise specified Group A subgroups Device type Limits Unit Min Max Input low voltage VIL1, 2, 3 All 0.8 V

31、 Input high voltage (except X1/CLK) VIH2.0 V Input high voltage (X1/CLK) VIH4.0 V Output low voltage VOLIOL= 2.4 mA, VCC = 4.5 V 0.4 V Output high voltage (except open collector outputs) VOHIOH= -400 A, VCC= 4.5 V 2.4 V Input leakage current IILVI= 0 V to VCC-25 10 A Data bus three-state leakage cur

32、rent IOZL, IOZHVO= 0.4 V to VCC-10 10 A X1/CLK low input current IIL(X1) VI= 0 V, X2 grounded -6.0 0.0 mA X1/CLK high input current IIH(X1) VI= VCC, X2 grounded -1.0 1.0 mA X2 low input current 3/ IIL(X2) VI= 0 V, X1/CLK floated -100 0.0 A X2 high input current 3/ IIH(X2) VI= VCC, X1/CLK floated 0.0

33、 100 A Open collector output leakage current IOHVO= 0.4 V to VCC-10 10 A Power supply current ICCVCC= 5.5 V 15 mA Input capacitance CINVIN= 0 V, FC= 1 MHz See 4.3.1c 4 20 pF Functional tests See 4.3.1d 7, 8 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking per

34、mitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-89532 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 2/ -55C TC +125C 4.5 V dc VCC 5.5

35、V dc unless otherwise specified Group A subgroups Device type Limits Unit Min Max Reset pulse width tRESSee figure 4. 4/ 9, 10, 11 01, 02 1.0 ns A0A3 setup time to RDN, WRN low tAS10 ns A0A3 hold time from RDN, WRN low tAH100 ns CEN setup time to RDN, WND low tCS0 ns CEN hold time from RDN, WRN high

36、 tCH0 ns WRN, RDN pulse width tRW225 ns Data valid after RDN low tDD175 ns Data bus floating after RDN high tDF110 ns Data setup time before WRN high tDS100 ns Data hold time after WRN high tDH20 ns High time between READS and/or WRITES 5/ 6/ tRWD200 ns Port input setup time before RDN low tPS0 ns P

37、ort input hold time after RDN high tPH0 ns Port output valid after WRN high tPD400 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A

38、5962-89532 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 2/ -55C TC +125C 4.5 V dc VCC 5.5 V dc unless otherwise specified Group A subgroups Device type Limits Unit Min Max INTRN (or OP3-OP7 when used as interrup

39、ts) negated from: See figure 4. 4/ Read RHR (RxRDY/FFULL interrupt) tIR19, 10, 11 01, 02 325 ns Write THR (TxRDY interrupt tIR2325 ns Reset command (delta break interrupt) tIR3325 ns Stop C/T command (counter interrupt) tIR4325 ns Read IPCR (input port change interrupt) tIR5325 ns Write IMR (clear o

40、f interrupt mask bit) tIR6325 ns X1/CLK high or low time tCLK100 ns X1/CLK frequency fCLK2.0 4.0 MHz CTCLK (IP2) high or low time tCTC100 ns CTCLK (IP2) frequency 7/ fCTC0 4.0 MHz RxC high or low time tRX220 ns RxC frequency (16X) 7/ fRX0 2.0 MHz RxC frequency (1X) 7/ fRX0 1.0 MHz TxC high or low ti

41、me tTX220 ns TxC frequency (16X) 7/ fTX0 2.0 MHz TxC frequency (1X) 7/ fTX0 1.0 MHz TxD output delay from TxC low tTXD350 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MAR

42、ITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-89532 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 2/ -55C TC +125C 4.5 V dc VCC 5.5 V dc unless otherwise specified Group A subgroups Device type Limits Unit Min Max

43、Output delay from TxC low to TxD data output tTCSSee figure 4. 4/ 9, 10, 11 01, 02 0 150 ns RxD data setup time to RxC high tRXS240 ns RxD data hold time from RxC high tRXH200 ns RESETN pulse width tRES03 1.0 s A1-A4 setup to CSN low tAS10 ns A1-A4 hold time from CSN high tAH0 ns R/WN setup time to

44、CSN high tRWS0 ns R/WN holdup time to CSN high tRWH0 ns CSN high pulse width 8/ tCSW90 ns CSN or IACKN high from DTACKN low 9/ tCSD20 ns Data valid from CSN or IACKN low tDD175 ns Data bus floating from CSN or IACKN high tDF100 ns Data setup time to CLK high tDS100 ns Data hold time from CSN high tD

45、H0 ns DTACKN low from read data tDAL0 ns DTACKN low (read cycle) from CLK high tDCR125 ns DTACKN low (write cycle) from CLK high tDCW125 ns DTACKN high from CSN or IACKN high tDAH100 ns DTACKN high impedance from CSN or IACKN high tDAT125 ns See footnotes at end of table. Provided by IHSNot for Resa

46、leNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-89532 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/

47、 2/ -55C TC +125C 4.5 V dc VCC 5.5 V dc unless otherwise specified Group A subgroups Device type Limits Unit Min Max CSN or IACKN setup time to clock high 10/ tCSCSee figure 4. 4/ 9, 10, 11 03 90 ns Port input setup to CSN low tPS0 ns Port input hold time CSN high tPH0 ns Port output valid from CSN

48、high tPD400 ns INTRN, or OP3-OP7 when used as interrupts, negated from: Read RHR (RxRDY/FFULL interrupts) tIR19, 10, 11 03 325 ns Write THR (TxRDY interrupt) tIR2325 ns Reset command (delta break interrupt) tIR3325 ns Stop C/T command (counter interrupts) tIR4325 ns Read IPCR (input port change interrupt) tIR5325 ns Write IMR (clear of interrupt mask bit) tIR6325 ns X1/CLK high or low time tCLK100 ns X1/CLK frequency fCLK2.0 4.0 MHz CTCLK high or low time tCTC100 ns CTCLK frequency fCTC0 4.0 MHz RxC high or low time tRX220 ns RxC fr