DLA SMD-5962-88568-1988 MICROCIRCUITS DIGITAL NMOS SINGLE COMPONENT 8-BIT MICROCOMPUTER MONOLITHIC SILICON《硅单片8位微机单一组装沟道金属氧化物半导体数字微电路》.pdf

《DLA SMD-5962-88568-1988 MICROCIRCUITS DIGITAL NMOS SINGLE COMPONENT 8-BIT MICROCOMPUTER MONOLITHIC SILICON《硅单片8位微机单一组装沟道金属氧化物半导体数字微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-88568-1988 MICROCIRCUITS DIGITAL NMOS SINGLE COMPONENT 8-BIT MICROCOMPUTER MONOLITHIC SILICON《硅单片8位微机单一组装沟道金属氧化物半导体数字微电路》.pdf（20页珍藏版）》请在麦多课文档分享上搜索。

1、DESC-DWG-88568 57 9977775 00L2687 T -c .a Z DATE (YR-MO-DA) LTR DESCRIPTION APPROVED REVSTATUS 1 :i:ET OF SHEETS PMIC NIA STANDARDIZED MILITARY DRAWING MIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMm AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMCC NIA DEFENSE ELECTRONICS SUPPLY CENTER I) US. GOVtRNM

2、tNl PRIHTING OFFICt: 1987 - 748-12916091 I DESC FORM 193 SEP 87 5962-E801 DISTRIBUTION STATEMENT A. Approved lor public release; distribution Is unlimited. I- + . Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-_ DESC-DWG-88568 57 = 7777775 0012b70 6

3、 i 8. SIZE STANDARDIZED 5962-88568 A MILITARY DRAWING . DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET 2 DAYTON, OHIO 45444 i 1. SCOPE 1.1 SCO e. This drawing describes device requirements for class 13 microcircuits in accordance with l.ubmitted to DESC-ECS prior to listing as an approved so

4、urce of supply shall state that the ianufacturer s product meets the requirements of MIL-STD-883 (see 3.1 herein) and the requi rements ierein. 3.5 Certificate of compliance. A certificate of compliance shall be required from a manufacturer The certificate of compliance REVISION LVEL SHEET 3 I DESC

5、FORM 193A SEP 87 .- O.S. GOVERNMENT PRINTING OFFICE 1987-549096 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DESC-DWG-8568 57 W 9777795 0012692 T / TABLE I. Electrical performance characteristics. I I I I I Limits vcc I5 v *lo% I I I unless otherw

6、ise specified! I I I I I I I Condi ti ons IDevice I Group A Uni I type Isubgroups I Min I Max I -55OC o I m E E l- .I- .I- e r“ s w a n Ir L a a n I- M N N I- O 8 a n f W 1 a J n t a J i J a i, 9 B t- O a W nI- z= X w $2 (3 O K a SIZE 5962-88568 A STANDARDIZED MILITARY DRAWING I SHEET 15 DEFENSE ELE

7、CTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVIMN LEVEL ESC FORM 193A * US. QOMRNMENT PRaIllNQ Om 1987-549496 SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- DESC-DWG-B568 57 W 7777735 0012704 2 m i Q n “N u II u (u J J X X - 2 2 (u A a a l- I

8、- X X m (u 4 U LL m Il FI U n rl + IL Q O (u II CI) U - 4 a t- x al U L 3 O v) 7 m E L al +- E* Y- 0-l c L L 2+ .r .r n TANDARI MILITARY DI SIZE 5962-88568 IIZED IAWING A DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET 16 I DAYTON, OHIO 45444 r?r US GOVERNMENT PRINTING OFFICE i4494 .-: ESC FO

9、RM 193A SEP 87 .k Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DESC-DWG-88568 57 m 7799775 0032705 Lt F -6 STANDARDIZED MILITARY DRAWING 3.6 Certificate of conformance. A certificate of conformance as required in MIL-STD-883 (see 3.1 ierein) shall

10、 be provided with each lot of microcircuits delivered to this drawing. r 5962-88568 SIZE A Y 3.7 Notification of change. Notification of change to DESC-ECS shall be required in accordance Mith MIL-STO-883 ( see 3.1 herein). 3.8 Verification and review. DESC, DESCs agent, and the acquiring activity r

11、etain the option to review the manufacturer s facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. QUALITY ASSURANCE PROVISIONS 4.1 Sampling and inspection, Sampling and inspection procedures shall be in accordance w

12、ith 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be section 4 of MIL-M-38510 to the extent specified in MIL-STD-883 (see 3.1 herein). :onducted on alT devices prior to quality conformance inspection. The following additional criteria ;hall apply: a. Burn

13、-in test, method 1015 of MIL-STO-883. (i) Test condition A, 6, C, or O using the circuit submitted with the certificate of compliance (see 3.5 herein). (2) TA = +125“C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parame

14、ter tests prior to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with nethod 5005 of MIL -STO-883 including groups A, 8, C, and D inspections. The following additional :riteria shall apply. 4.3.1

15、Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STO-883 shall be omitted. c. Subgroups 7 and 8 test sufficiently to verify the instruction set on figure 3. 4.3.2 Groups C and D inspections. a. End-point electrical paramet

16、ers shall be as specified in table II herein, b. Steady-state life test conditions, method 1005 of MIL-STD-883. (i) Test condition A, B, C, or D using the circuit submitted with the certificate of compliance (see 3.5 herein). (2) TA = +125C, minimum. (3) Test duration: 1,000 hours, except as permitt

17、ed by method 1005 of MIL-STD-883. DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET 17 I DAYTON, OHIO 45444 * U S. QOVERNMENT PRINTING OFFICE 1487-549098 ESC FORM 193A SEP 87 i L 7 Y Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- _ - DESC-DWG-

18、88568 57 7777775 00L270b 6 TABLE II. Electrical test requirements. 1 I Subgroups I MIL-STO-883 test requirements 11 (per method I I 5005, table I) I I l I- I T (method 5004) I I 1Final electrical test parameters I I I I IGroup A test requirements I I I 1Groups C and D end-point I electrical paramete

19、rs I I (method 5005) I I I I I I I (method 5004) I :0:Si3,8,9, I I (method 5005) 1 :s:i1.1,8,9, I Interim electrical parameters *PDA applies to subgroup 1. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with 6. NOTES 6.1 Intended use. Microcircuits con

20、forming to this drawing are intended for Use when military IIL-M-38510. ;pecifications do not exist and qualified military devices that will perform the required functiLot ire not available for OEM application. When a military specification exists and the product covered by this drawing has been qua

21、lified for listing on QPL-38510; the device specifled herein will be nactivated and will not be used for new design. The QPL-38510 product shall be the preferred item or al 1 applications . 6.2 Re laceabilit . Microcircuits covered by thfs drawing will replace the same generic device :overed w y a c

22、ontractor-prepared specification or drawing, 6.3 Comments. Comments on this drawing should be directed to DESC-ECS, Dayton, Ohio 45444, or :elephom96-537 5. 5962-88568 STANDARDIZED SIZE A MILITARY DRAWING DEFENCE ELECTRONICS SUPPLY CENTER AEVISN LEVEL SHEET 18 I MYTON, OHK) 45444 U S GOVERNMENT PRIN

23、TING OFFCE: 1987-544098 iSC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-a -% DESC-DWG-5b 57 W 7799795 0012707 W STANDARDIZED MILITARY DRAWING DEFENSE UECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 6.4 Pin descriptions. 5962-88568 SI

24、ZE A REVISION LEVEL SHEET 19 Symbol vss VDD “cc PROG Port 1 Port 2 P 10-Pl 7 P20-P27 DBO-DB7 BUS TO T1 m m m m AL E PSEN 3s Pin no. Function 20 26 40 25 21-3 21-24 35-38 12-19 1 39 6 8 4 10 11 Circuit GND potential . Low power standby pin. Main power supply; +5 Y during operation. Output strobe for

25、an 1/0 expander. 8-bit quasi-bidirectional port. 8-bi t uasi -bidi rectional port. P20-P29 contain the four high order program counter bits during an external program memory fetch and serve as a 4-bit 1/0 expander bus for an 1/0 expander. TrueJdkectional port which can be written or read synchronous

26、ly using the RD, WR strobes. The port can also be statically latched. Contains the 8 low order program counter bits during an external program memory fetch, and receives the addressed instruction under the control of m. Also contains the addrE a data %ring an external RAM data store instruction, und

27、er control of ALE, RD, and WR. Input pin testable using the conditional transfer instructions JTO and JNTO. TO can be designated as a clock output using ENTO CLK instruction. Input pin testable using the JT1 and JNT1 instructions. Can be designated the timer/counter input using the STRT CNT instruct

28、ion. Interrupt input. Initiates an interrupt if interrupt is enabled. Interrupt is disabled after a reset, Also testable with conditional jump instruction. (Active low.) for proper operation. Output strobe activated during a BUS read. the bus from an external device. Used as a read strobe to externa

29、l data . memory. (Active low.) Input which is used to initialize the processor (active low), and in power down mode (non TTL VIH). Output strobe during a bus write. (Active low.) Used as write strobe to external data memory. Address latch enable. This signal occurs once during each cycle and is usef

30、ul as a clock output. The negative edge of ALE strobes address into external data and program memory. Program store enable. This output occurs only during a fetch to external program memory. (Active low.) Single step input can be used in conjunction with ALE to “single step“ the processor through ea

31、ch instruction, Interrupt must remain low for at least three machine cycles Can be used to enable data onto (Active low. 1 DESC FORM 193A SEP a7 * O.S. QOMRNMENT PRRITIHOOFFEE 18(17-M9045 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- -. _ DESC-DWG

32、-885b8 57 m 7777775 0032708 T m - Symbol Pin no. - Function EA 7 External access input which forces all program memory fetches to reference external memory. Useful for emulatian and debug, and essential for testing and program verification. XTAL1 2 One side of crystal input for internal oscillator.

33、Also input for external source. (Non TTL VIH.) XTAL2 3 Other side of crystal input. (Active low. 1 6.5 Approved source of supply. An approved source of supply is listed herein. Additional ,ources will be added as they become available. The vendor listed herein has agreed to this drawing ind a certif

34、icate of compliance (see 3.5 herein) has been submitted to DESG-ECS. I I Vendor I Vendor Rep1 acement I I Military drawing I CAGE I similar part Imilitary specification1 number L/ I part number I I I I I part number I I 5962-8856801QX I 34649 I MD8035AHL/B I I I I I -I I I 5962-8856802OX I 34649 I M

35、D8048AH/B I I - i/ Caution. Do not use this number for item acquisition. Items acquired to thismber may not satisfy the performance requirements of this drawing, Vendor CAGE number 34649 Vendor name and address Intel Corporation 5000 W. Williams Field Road Chandler, A2 85224 5962-88568 STANDARDIZED SIZE A MILITARY DRAWING DEFENSE ELECTRONICC SUPPLY CENTER RMSION LEVEL SHEET 20 I DAYII)p, OHK) 4- US QOVERNMENT PRWlNQ OFFICE 1667-549498 ESC FORM 193A SEP 87 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-