DLA SMD-5962-87667 REV C-1993 MICROCIRCUIT HIGH PERFORMANCE CMOS BUS BUFFERS MONOLITHIC SILICON《硅单块 高性能互补金属氧化物半导体总线缓冲器 微型电路》.pdf
《DLA SMD-5962-87667 REV C-1993 MICROCIRCUIT HIGH PERFORMANCE CMOS BUS BUFFERS MONOLITHIC SILICON《硅单块 高性能互补金属氧化物半导体总线缓冲器 微型电路》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-87667 REV C-1993 MICROCIRCUIT HIGH PERFORMANCE CMOS BUS BUFFERS MONOLITHIC SILICON《硅单块 高性能互补金属氧化物半导体总线缓冲器 微型电路》.pdf(14页珍藏版)》请在麦多课文档分享上搜索。
1、NOTICE OF REVISION (NOR) (See MIL-STO-480 for instructions) This revision described below has been authorized for the document listed. Defense Electronics Supply Center Dayton, Ohio 45444-5277 TE (ml Form Approved On6 NO. 0704-0188 93/ 03/19 I. ORIGIWATOR IUIE ANI IIWRESS 2. CAGE COOE 3. mw. 9. COWF
2、IGUUTION IlH (OR SVSrm) TO WHICH ECP APPLIES ALL 10. DESCRIPTION OF REVISION Sheet 1: Revisions ltr column: add “C“ Revisions description column: add “Changes in accordance with Revisions date column: add “93-03-19“. Revision level block: add “C“. Revision status of sheet: for sheets 1,5, add “C“. T
3、able I, Change from: Propagation delay output disable (q) to YI. NOR 5962-R099-93“. Sheet 5: to: Propagation delay output enable (v to YI. to YI“ for synbols tpHZ. tpLZ. Also add test condition statement “Propagation delay output disable (oz) Revision level block; add “C“. 67268 4. CAGECOOE 11. a. C
4、HECK ONE XIEXISTING DOCUMENT SUPPLEMENTED THIS SECTION FOR GOVERNENT USE ONLY I REVISED WCUMENT MUST BE CUSTODIAN OF MASTER WCUMENT BY THIS NOR MAY BE USED IN RECEIVED BEFORE MANUFACTURER SHALL HAKE ABOVE REVISION AND MANUFACTURE. MAY INCORPORATE THIS CHANGE. FURNISH REVISED WCUMENT TO: I I 5962-R09
5、9-93 5. DocuENTmi. b. ACTIVITY AUTHORIZED TO APPROVE SIGNATURE AND TITLE I Monica L. Poelking CHANGE FOR GOVERNMENT 6. TITLE OF WCuEi MICROCIRCUIT. HIM PERFORMWCE CMOS BUS BUFFERS, IOIIOLITHIC SILICOW. DATE (YYEIEM) I 93/03/19 67268 5w-87667 7. RNISIOII LETTER (Current) B (New) C 8. ECP mi. - DESC-E
6、CC CHIEF MI CROELECTRON ICs BRANCH 12. ACTIVITY ACCa9LISHING REVISICM ESC-ECC REVISION COMPLETED (Signature) DATE (YYMM) Jeffery Tunstall 93/03/19 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DATE (YR-MO-DA) LTR DESCRIPTION A Change absolute maxim
7、um rating of . 88-09-27 Change figure 4. Editorial changes throughout. B Add device types 05 and 06. Changes to 92-11-13 table I. Editorial changes throughout. THE ORIGINAL FRONT PAGE OF THIS DRAWING WS BEEN REPLACED APPROVED M.A. Frye M. L. Poelking REV III CHECKED BY D.A. DiCenzo APPROVED BY Rober
8、t P. Evans DRAWING APPROVAL DATE 87-09-16 REVISION LEVEL B SHEET REV DAYTON, OHIO 45444 MICROCIRCUIT, HIGH PERFORMANCE CMOS BUS BUFFERS, MONOLITHIC SILICON SIZE CAGE CODE 5962-87667 A 67268 SHEET 1 OF 12 SHEET REV STATUS OF SHEETS PMIC NIA STANDARD1 Z ED MILITARY DRAWING THIS DRAWING IS AVAILABLE FO
9、R USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A )ESC FORM 193 JUL 91 DISTRIBUTION STATEMENT A. PREPARED BY Ray Monnin I DEFENSE ELECTRONICS SUPPLY CENTER 5962-EWI-93 4pproved for public release; distribution is unlimited. Provided by IHSNot for ResaleNo reproduction or ne
10、tworking permitted without license from IHS-,-,-1. SCOPE STANDARDIZED MILITARY DRAWING DEFENSB ELECTRONICS SUPPLY CBHTER DAYTON, OHIO 45444 1.1 Scope. 1.2 Part or Identifying Number (PIN). The complete PIN shell be as shown in the following exanple: This drawing describes device requirements for cla
11、ss 6 microcircuits in accordance with 1.2.1 of MIL-STD-883, “Provisions for the use of MIL-STD-883 in conjunction with conpliant non-JAN devices“. SIzg 5962-87667 A REVISION LEVEL SIEZT 5962-87667 o1 L - I l I I I Case outline Device type (see 1.2.1) (see 1.2.2) Drawing number X I I Lead finish (see
12、 1.2.3) 1.2.1 Device tme(s). The device typds) shall identify the circuit function as follows: Device type Generic number Circuit function o1 02 o3 o4 05 O6 29C827 291828 29C927 291928 29C827A 29C82A High performance CWS noninverting bus buffer High performance CMOS inverting bus buffer High perform
13、ance CROS noninverting bus buffer (rotated die) i/ High performce CMOS inverting bus buffer rotated die) i/ High performance CHOS noninverting bus buffer High performance CMOS inverting bus buffer 1.2.2 Case outline($). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outli
14、ne letter Descriptive designator L GDIP3-T24 or CDIP4-T24 K GDFP2424 or CDFP3-F24 3 CQCCI-N28 1.3 Absolute maximum ratings. Supply voltage range - - - - - - - - - - - - - - - Input voltage range - - - - - - - - - - - - - - - - Storage temperature range - - - - - - - - - - - - - Maximum power dissipa
15、tion (PD) z/ - - - - - - - - DC output voltage range - - - - - - - - - - - - - - DC output diode current: Into output - - - - - - - DC output diode current: Out of output - - - - - - DC input diode current: Into input - - - - - - - - DC input diode current: Out of input - - - - - - - DC output curre
16、nt in accordance uith PON (isink): DC output current in acmrdance with PDN (Isourc,): DC output current in accordance with PDN (Isink): Device types O5 and O6 - - - - - - - - - - - - - DC output current in accordance with PDN (Isource): Device types 05 and O6 - - - - - - - - - - - - - Total dc groun
17、d current - - - - - - - - - - - - - - Total dc Vcc current - - - - - - - - - - - - - - - Lead temperature (soldering, 10 seconds) - - - - - - Thermal resistance, junction-to-case (OJc): Junction temperature (TJ) Device types M-04 Device types 01-04 - - - - - - - - - - - -_ - - - - - - - - - - - - -
18、- - Cases K, L, and 3 - - - - - - - - - - - - - - - - - - - - - - - - - - - i/ Not avai lable from an approved source of supply. I/ For TA = +100“C to +125“C, derate linearly at 10 mU/“C. i/ n = number of outputs, m = number of inputs. Terminals Package style 24 24 28 Dual-in-line Flat pack Leadless
19、 chip carrier 6.5 V dc to t7.0 V dc -0.5 V dc to 4-6.0 V dc -65OC to *150C 5w lnu -0.5 V dc to t6.0 V dc +50 mA -50 d t20 mA -20 WA 148 nA (2XIOL) -30 BA (2xIOH +loo RA -lw niA See HIL-STD-1835 150c DESC FORM 193A m 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without lice
20、nse from IHS-,-,-SMD-5962-87bb7 REV C b 0044273 891 STANDARDIZED MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 1.4 Recommended operating conditions. Supply voltage (V c!- - - - - - - - - - - - - - - - Minimum high levef input voltage (VI 1- - - - - - - Maximum low level input
21、 voltage (V 3 - - - - - - - +4.5 V dc to t5.5 V dc 2.0 V dc 0.8 V dc -55OC to +125uc Case operating temperature range Ac) - - - - - - - 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and bulletin. Unless otherwise Specified, the following specification, standards, and bulletin of t
22、he issue listed in that issue of the Department of Defense Index of Specifications and Standards specified in the solicitation, form a psrt of this drawing to the extent specified herein. SPECIFICATION MILITARY MIL-M-38510 - Microcircuits, General Specification for. STANDARDS SIZE 5962-87667 A REVIS
23、ION LEVEL SHEET B 3 MILITARY MIL-STD-883 - Test Methods and Procedures for Microelectronics. MIL-STD-1835 - Microcircuit Case Outlines. BULLETIN MILITARY MI L-BUL-1 O3 - List of Standardized Military Drawings (SMDs). (Copies of the specification, standards, and bulletin required by manufacturers in
24、connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting activity.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing shall take prece
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