DLA SMD-5962-87549 REV H-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED QUAD 2-INPUT NAND GATE MONOLITHIC SILICON.pdf
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1、REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change AC limits in table I. Add vendor CAGE 18714 to device type 01CX. Editorial changes throughout. 87-11-16 R. R. Evans B Changes in accordance with NOR 5962-R100-93. 93-03-23 Monica L. Poelking C Changes in accordance with NOR 5962-R181-93. 93
2、-06-25 Monica L. Poelking D Add vendor CAGE F8859. Add device Class V criteria. Add delta limits, table III. Add case outline X. Update boilerplate to MIL-PRF-38535 requirements. lgt 01-03-23 Raymond Monnin E Add section 1.5, radiation features. Update the boilerplate to include radiation hardness a
3、ssured requirements. Editorial changes throughout. - TVN 03-10-01 Thomas M. Hess F Add appendix A, microcircuit die. Update the boilerplate to MIL-PRF-38535 requirements and to include radiation hardness assurance requirements. Editorial changes throughout. - jak 07-02-16 Thomas M. Hess G Add new de
4、vice type 03 with V class criteria. Update the boilerplate to current MIL-PRF-38535 requirements. - MAA 08-11-24 Thomas M. Hess H Add RHA device type 03. Add radiations features for device type 03 in section 1.5. Update footnote 3/ to table IA. Update boilerplate paragraphs to current MIL-PRF-38535
5、requirements - MAA 13-12-12 Thomas M. Hess CURRENT CAGE CODE 67268 REV SHEET REV H H H H H H H H H SHEET 15 16 17 18 19 20 21 22 23 REV STATUS OF SHEETS REV H H H H H H H H H H H H H H SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Greg A. Pitz DLA LAND AND MARITIME COLUMBUS, OHIO 43218
6、-3990 http:/www.landandmaritime.dla.mil/ STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY N. A. Hauck APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, QUAD 2-INPUT NAND GA
7、TE, MONOLITHIC SILICON DRAWING APPROVAL DATE 87-04-29 REVISION LEVEL H SIZE A CAGE CODE 14933 5962-87549 SHEET 1 OF 23 DSCC FORM 2233 APR 97 5962-E521-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARIT
8、IME COLUMBUS, OHIO 43218-3990 SIZE A 5962-87549 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and l
9、ead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: For device classes M and Q: 5962 - 87549 01 C A Federal RHA Devi
10、ce Case Lead stock class designator type outline finish designator (see 1.2.1) (see 1.2.2) (see 1.2.4) (see 1.2.5) / / Drawing number For device class V: 5962 F 87549 01 V X A Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) desi
11、gnator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified
12、 RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54AC00 Quad 2-input NAND gate 02 54AC11000 Quad 2-input NAND gate 0
13、3 54AC00-SP Quad 2-input NAND gate 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators w
14、ill not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qua
15、lification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-87549 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case
16、 outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-line D GDFP1-F14 or CDFP2-F14 14 Flat pack E GDIP1-T16 or CDIP2-T16 16 Dual-in-line F GDFP2-F16 or CDFP3-F16 16 Flat pack 2 CQCC1-N20 20 Squ
17、are leadless chip carrier X CDFP3-F14 14 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage
18、 range (VIN) -0.5 V dc to VCC + 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIK, IOK) . 20 mA DC output current 50 mA DC VCCor GND current (per pin) . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 500 mW Lead tempe
19、rature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC). See MIL-STD-1835 Junction temperature (TJ) . +175C 4/ 1.4 Recommended operating conditions. 2/ 3/ 5/ 6/ Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Input voltage range (VIN) +0.0 V dc to VCCOutput voltage range (VO
20、UT) +0.0 V dc to VCCCase operating temperature range (TC) -55C to +125C Minimum input rise or fall rate (V/t): Device type 01and 03 0 to 8 ns/V Device type 02 . 0 to 10 ns/V 1.5 Radiation features. For Device type 01: Maximum total dose available (dose rate = 50 300 rads (Si)/s) . 300 krads (Si) No
21、Single Event Latchup (SEL) occurs at effective LET (see 4.4.4.2) 93 MeV-cm2/mg 7/ No Single Event Upset (SEU) occurs at effective LET (see 4.4.4.2) . 93 MeV-cm2/mg 7/ For Device type 03: Maximum total dose available (dose rate = 50 300 rads (Si)/s) . 100 krads (Si) 1/ Stresses above the absolute max
22、imum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange
23、 and case temperature range of -55C to +125C. 4/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 5/ Operation from 2.0 V dc to 3.0 V dc is provided for compatibility with data retention
24、 and battery back-up systems. Data retention implies no input transition and no stored data loss with the following conditions: VIH 70% VCC, VIL 30% VCC, VOH 70% VCCat -20A, VOL 30% VCCat 20 A. 6/ Unused inputs must be held high or low to prevent them from floating. 7/ Limits are guaranteed by desig
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