DLA SMD-5962-87526 REV A-1988 MICROCIRCUIT MONOLITHIC N-CHANNEL SILICON GATE CLOCK GENERATOR AND CONTROLLER《时钟发生器和控制器单块N沟道硅口微型电路》.pdf

《DLA SMD-5962-87526 REV A-1988 MICROCIRCUIT MONOLITHIC N-CHANNEL SILICON GATE CLOCK GENERATOR AND CONTROLLER《时钟发生器和控制器单块N沟道硅口微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-87526 REV A-1988 MICROCIRCUIT MONOLITHIC N-CHANNEL SILICON GATE CLOCK GENERATOR AND CONTROLLER《时钟发生器和控制器单块N沟道硅口微型电路》.pdf（14页珍藏版）》请在麦多课文档分享上搜索。

1、DESC-DWG-7526 REV A,57 = 7777775 0008607 T m I -b c CURRENT CAGE CODE 67268 Original date of drawing: 9 MARCH 1987 AMSC NIA T 7- 2/-4s- t- .- I I 5962-E713 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. DESC FORM 193 MAY 86 Provided by IHSNot for ResaleNo reproduct

2、ion or networking permitted without license from IHS-,-,-I 1. SCOPE 1.1 SCO e. This drawing describes device requirements for class B microcircuits in accordance rith 1.&f MIL-STD-883, “Provisions for the use of MIL-STO-883 in conjunction with compliant ion-JAN devices“. 1,2 Part number. The complet

3、e part number chal -F 5962-87526 -I I I I I brawing number I I Device type (1.2.1) be as shown in the following examp.le: V 7- I I X 7- I I I I Case outline Lead finish per (1.2.2) MIL-M-38510 1.2.1 Device types. The device types shall identify the circuit function as follows: Device type Generic nu

4、mber Frequetrcy Ci rcuf t functf om o1 28 581-10/Z0858110 10 MHz C1 ock generator and control ler O2 28581 /20858 106 6.0 MHz Clock generator and controller 1.2.2 Case outline, The case outline shall be as designated in appendix C of MIL-M-38510, and as 01 1 ows : Outline letter Case outline V 2 C-2

5、 (20-Terminal ,350 x .350“), square chip carrier package D-6 (18-Lead 1/4“ x 15/16“), dual-in-line package 1,3 Absolute maximum ratings. Vc supply volta e range (referenced to round) - VoFtage on any p 3 n (referenced ta ground! - - - - Storage temperature range - - - - - - - - - - - - Maximum gower

6、 dissipation Lead temperature (soldering, 10 seconds)- - - - - Maximum j unctf on temperature ( TJ ) Th erma! resi stance junction- to-c ase ( eJC) : -0.3 V dc to +7.0 V dc -0.3 V dc to t7.0 V dc -65C to +150C +27OoC at-55C- - - - - - - - _- - _- - - - - - 1.5W at T = t125“C- - - - - - - - - - - - -

7、 t161“C Cases V and 2 - - - - - - - - - - - - - - - See MIL-M-38510, appendix C 1.4 Recommended operating conditions. Supply voltage (V cl- - - - - - - - - - - - - - - 4.5 V dc minimum to 5.5 V dc maximum Minimum high leve? input voltage (YIHI- - - - - - 2.0 V dc Maximum Tow level input voltage (VIL

8、) - - - - - - 0.8 V dc Frequency of operation: Device O1 - - - - - - - - - - - - - - - - - - - 0.5 MHz to 10.0 MHz Device 02 - - - - - - - - - - - - - - - - - - - 0.5“MHz to 6.0 MHz Case operating temperature range (TC) - - - - - - -55 C to +125 C Clock rise and fall times: Device 01 - - - - - - - -

9、 - - - - - - - - - - - 7 ns maximum Device 02 - - - - - - - - - - - - - - 10 ns maximum 5962-87526 CIZE A STANDARDIZED MILITARY DRAWING I DEFENSE ELECTRONICS SUPPLY CENiER DAYTON, OHIO 45444 3SC FORI4 193A SEP 87 * V.S. GOYERNMENT PRE(TKIG OWEE 1987449098 Provided by IHSNot for ResaleNo reproduction

10、 or networking permitted without license from IHS-,-,-DESC-DWG-87526 REV A 57 W 9777975 0008611 8 W 1 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET 3 I DAYTON, OHIO 45444 * US GOVERNMENT PAINTINO OFFICE 1907-549096 DESC FORM 193A SEP 87 ,/ ,f- STANDARDIZED MILITARY DRAWING 5962-87526 SIZE A

11、 2. APPLICABLE DOCUMENTS 2.1 Government specification and standard. Unless otherwise specified, the following ipecification and standard, of the issue listed in that issue of the Department of Defense Index of ipecifications and Standards specified in the solicitation, form a part of this drawing to

12、 the !xtent speci fled herein. SPEC IF ICATIOII MIL I TARY MI L-M-38510 - Microcircuits, General Specification for. STANDARD MILITARY MIL-STD-883 - Test Methods and Procedures for Microelectronics. (Copies of the specification and standard required by manufacturers in connection with specific icquis

13、ition functions should be obtained from the contracting activity or as directed by the :ontracting activity. 1 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the *eferences cited herein, the text of this drawing shall take precedence. 3. REQUIREMENTS 3.1 Ite

14、m requirements. The individual item requirements shall be in accordance with 1.2.1 of IIL-STD-883, “Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices ind as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical d

15、imensions shall be as specified in MIL-M-38510 and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Functional block diagram. The function block diagram shall be as specified on figure 2. 3.2.3 Case outline. The case outline shall be in accordance

16、 with 1.2.2 herein. 3.3 Electrical erfomance characteristics. Unless otherwise specified, the electrical performance characieristics are as specitied in table I and apply over the full recommended case jperati ng temperature range. 3.4 Markin . Marking shall be in accordance with MIL-STD-883 (see 3.

17、1 herein). The part shall je markd the part number listed in 1.2 herein. In addition, the manufacturers part number nay al so be marked as 1 isted i n 6.5 herein. 3.5 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved sou

18、rce of supply in 6.5. The certificate of compliance submitted to DESC-ECS prior to listing as an approved source of supply shall state that the nanufacturers product meets the requirements of MIL-STD-883 (see 3.1 herein) and the requirements herein. Provided by IHSNot for ResaleNo reproduction or ne

19、tworking permitted without license from IHS-,-,-TABLE I. Electrical performance characteristics. I I I I I Limits i I -55C 5 TC t125OC Isubgroupsl type IRin I Max r I VCC E 5.03 *lo% I I III I I Unless otherwise specified I I I I I I I generator I I 1-8.4 1t8.3 I I I I 1/1 I I 1-1 I I I I I I I I IL

20、/ I I Test ISymbol I Conditions IGroup A IDevicel I Unit Clock high input voltage IvIH1 IDriven by external clock i 1,2,3 I All IV c IV c I V Clock low input voltage IVIL1 IDriven by external clock I 1,2,3 I All 1-0.3 10.45 I V I f generator I I III Logic input high voltage VIH i 1 1,2,3 1 All I 2.0

21、 IVcc I V I I I 1t0.3 I I I I I yi I I III I I I I I li/ I I I I I I III I I I III I I I Logic input low voltage IVIL I I 1,2,3 I All 1-0.3 I 0.8 I V Logic low output voltage (VOL IIOL = 2.0 mA Logic high output voltage IVOH IIOL = -250 NA Power supply current i 1,2,3 I All I I 0.4 I V I 1,2,3 I All

22、 I 2.4 I I I I I I I lcc !outputs open I 1,2,3 I All I I 150 I mA I I I I i 1,2,3 I I I I III I I I I III I I I 1+0.3 I I I I I -1 I I I III 1 I pin I I iy I I III I I I I I I /VOH !I H = -50 PA tested at 5 PS I 1,2,3 I All IV c I I I 1-8.4 I I laker ZCLK or TCLK rises I I I I I IV I I I ITOH = -250

23、 VA I I I I I I I I iv III IVCC = 5*5 I I Input leakage current low IIIL IVIfj = 0.4 V I All 1-10 It10 1 PA Input leakage current high IIIH IVIN = 2.4 V I 1,2,3 I All 1-10 It10 I NA Input high voltage on STRT IVIHSTRTI 1 1,2,3 I All I 2.3 IVcc I V pin I I I Input low voltage on STRT IVILSTRTI I 1,2,

24、3 I All 1-0.3 I 0.5 I V Output high voltage (ZCLK, TCLK) I I See footnotes at end of table, SIZE 5962-87526 A STANDARDIZED MILITARY DRAWING I 4 DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 AMSION LEVEL )ESC FORM 193A US GVERNMOYTPRHlWNQOFFCE 1837-$48098 SEP 87 - -. .&- . - _Fa-=- _- Provided

25、 by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DESC-DWG-7526 REV A 57 W 7777775 0008633 I W TABLE I. Electrical performance characteristics - Continued. I Limits I ievice I I Unit type Imin I M ax I 1 I I I I I Test Symbol i Conditions Group A I I -55C TC +

26、125OC I I I subgroupr I Vcc =-5.0 V I101 IUnless otherwise specified1 I I I I I o1 110.0 I I MHz 02 I 6.0 I I I I MHz - All I I 35 1 pF I II All I I 10 I pF I I I All I I 15 I pF I II Limits I I 9s10a11 aximum frequency fMX i i/ I- I I l I I I lock capacitance ICCLOCK See 4.3.1 14 I I I nput capacit

27、ance ICIN ISee 4.3.1 14 I I I utput capacitance !COUT !See 4.3.1 I i4 I I I I I -55C TC +125“C- Isubgroup! I I Un1 ess otherwise specified I I I I 1- I Test ISymbol I Conditions 2/ Group A I I Vcc 7 5.07 *lo% 1 lock input high width ITKH I i/ ?/ I 9,10,11 ini t -02 I linlnaxl II 7 31 I I ns -I I lef

28、er- I ince I - IO. I& II 1 118 I II li T 2 li8 I II - 3 150 I II 7 31 I I ns II T 62 I I ns II I I lock input low width !T,cL ! i-/ ?/ 9,10,11 I I lock input cycle time lTpc I 3/ I- 9,10,11 II T I I lock input fall time fTfc I i/ 31 I- 9,10,11 4 i 17 I 5 I 17 II i10 i ns II 7 I I I lock input rise t

29、ime !TK ! i-/ ?/ I 9,10,11 i10 i ns II T ii II T 6 I 120 I I I I 9,10,11 I lock input to OSC ITdOSC I delay I I I30 i ns II T - I“ I 9,10,11 7 i i25 T II I I I CLK fall time (TfZC ICL = 200 pF 9,10,11 8 i il0 T 9 I Il0 T II II i10 i ns II I I I I tretch controls to ITSc I I I CLK rise time ITzc ICI-

30、 = 200 PF OSC + setup I ee footnotes at end of table. i10 i ns II - 9,10,11 9,lO , 11 35 I I ns II II 10 120 I II II STANDARDIZED MILITARY DRAWING 5962-87526 DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET I DAWON, OHIO 45444 f? U S GOVERNMENT PRINTING OFFICE 1987-549096 DESC FORM 193A SEP 87

31、 If# a Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-TABLE I. Electrical performance characteristics - Continued. 1 I Limits I I vcc = 5.07 *lo% IUnless otherwise specified1 11111 I I I I I I 1 Stretch controls to IThSC I I IIIII I OX 1. hold I I I

32、 counter reset I I III I del ay I I I I III11 I I III I I I I I 11111 I I I I Conditions 2/ Iiiroup A :Refer-! I Unit I -55C 5 TC +l% Icubgroupslence I -01 I -02 I I no“. IMi n IMax IMin IMax I Test I 9,10,11 1 11 Il0 I 120 I I I I 9,10,11 I 12 I 125 I 135 I ns I 9,10,11 i 13 1 125 I 130 I ns I I I

33、I I Ps STRT + to 2-bit ITd(ST/CR) f OSC 4 to 2-bit ITd(OSC/CC) 1 0 counter change I I 9,10,11 I 14 I I 1 9,10,11 I 15 I 120 1 130 i ns 9,10,1 I 16 120 I 130 i I ns STRT low width ZCLK 4 to RSTO RSTI + to ZCLK RSTI + to ZCLK RSTO low width STRT+ to ZCLK del ay ITd(RST0) I I I IIIII I 1 11111 I 9,10,1

34、1 I 17 120 I 130 I setup hold I (Th(RST1) f I I I I I I Ins I 9,10,11 i 18 I I I I I I Ps I 1 i 9,10,11 19 130 I 140 I 1 1 11111 IIIII I I 1 I I I 9,10,11 I 20 I 130 I 140 I ns I I III I IIIII I I I 9,o,ii I 21 1 !io I 110 I ns ICL = 2oo pl: I 1 IIIII ICL = 200 pF i 9,1o, I 22 I lo I I10 I ns I I I

35、I 1 I Ts( STIZC 1 I setup to include I I ZCLK edge I I I I I I i TdT C 1 I Clock input to TCLK delay TCLK rise time TrTC TCLK fall time - i/ Guaranteed by characterization and design. - 2/ See figure 3, CL = 100 pF *lo% unless otherwise specified. - 3/ Clock input other than a crystal oscillator. 4/

36、 - Assuming ZCLK rising. I I 1 IIIII SIZE A STANDARDIZED 5962-87526 )ESC FORM 193A SEP a7 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- DESC-DWG-8752b REV A 59 9999995 0008625 5 = SIZE A STANDARDIZED XTLlA XTL 1 B 5962-87526 STRH MILITARY DRAWING

37、I“ I -1-5 v ADD 1 ADD2 - STRT CO Device types O1 and 02 Case Y 6 7 8 9 RST 1 RSTO OSC ZCLK GND TCLK XTL2A XTL2B c1 FIGURE 1. Terminal connections. DEFENSE ELECTRONICS SUPPLY CENTER REVISION LEVEL SHEET 7 I DAYTON, OHIO 45444 DESC FORM 193A SEP 87 U.S.OOVERNMWTPRINTING OFFICE: 1987-549496 Provided by

38、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- - _ _ _- DESC-DWG-752b REV A 59 M 9999795 0008bLb 7 Device types O1 aiid 02 Case 2 - - .-.-STRH XTLIB XTLIA RSTI RSTO 14 XTL2A TCLK 9 IO 12 I3 - ADD2 STRT CO CI XtL2B FIGURE 1. Teminal connections - Continued. .

39、STANDARDIZED I MILITARY DRAWING I 5962-87526 I I DEFENSE ELECTRONICS SUPPLY CENIER DAYTON, OHIO 45444 I I SHEET 8 DESC FORM 193A #7 U.S G0YERNMENT PRHTYYG OFFICE: 19117-549098 SEP a7 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DESC-DWG-752b REV A

40、 59 9999975 0008617 9 W STRETCH CONTROL LOGIC Device types O1 and O2 Qo “ - -e Q1 RST i OSC + +2 I l I TCLK cc SIZE A STAN DARDI Z ED XTAL 1A XTAL 1 B 5962-87526 STRT MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 STRH REVISION LEVEL SHEET 9 A - I NH ADD 1 ADD2 XTAL2A XTAL2B 4

41、 ose I I 4- * occ r“ ZCLK 1 il I I FIGURE 2. Functional block diagram. DESC FORM 193A SEP 87 7!7 US GOVERNMENTPRINTIPIG OFFICE 1987-549006 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Device types O1 and O2 STANDARDIZED MILITARY DRAWING DEFENSE EL

42、ECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 XTALIA o sc SIZE A 5962-87526 REVISION LEVEL SHEET 10 A ZCLK STRETCH CONTROL CO ,CI ._ RST I 7 RCTO XTAL2A TCLK -0- “7 / Timing measurements are made at the fol lowing voltages : High Low ZCLK, TCLK 4.0 V 0.8 V output 2.0 v 0.8 V Input 2.0 v 0.8 V FIGURE 3.

43、 Timing diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-3.6 Certificate of conformance. A certificate of conformance as required in MIL-STD-883 (see 3.1 erein) shall be provided with each lot of microcircuits delivered to this drawing. STAND

44、ARDIZED SIZE A MILITARY DRAWING 3.7 Notification of change. Notification of change to DESC-ECS shall be required in accordance ith MIL-SrD-885 ( see 4.1 nerein). 5962-87526 3.8 Verification and review. DESC, DESCs agent, and the acquiring activity retain the option to eview the manufacturers facilit

45、y and applicable required documentation. Offshore documentation hall be made available onshore at the option of the reviewer. 4. QUALITY ASSURANCE PROVISIONS 4.1 -. Sampling and inspection procedures shall be in accordance with ection 4 of MIL - M 58510 t o the extent specified in MIL-STD-883 (see 3

46、.1 herein). 4.2 Screenin . Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be onducte -a-+ on a devices prior to quality conformance inspection. The following additional criteria hall apply: a. Burn-i n test (method 1015 of MIL-STD-883). (1) Test condition A, 8, C, or D u

47、sing the circuit submitted with the certificate of (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. compliance (see 3.5 her

48、ein). 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with iethod 5005 of MIL - STD 883 i ncluding groups A, E, C, and D inspections. The folTowing additional :riteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein.

49、b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroup 4 (GIN, COUT and CCLQCK measurement) shall be measured onTy for the initial test and after process or design changes which may affect capacitance. d. Subgroup 7 functional testing shall include verification of in