DLA SMD-5962-86709 REV F-2008 MICROCIRCUIT DIGITAL BIPOLAR MEMORY 16 X 48 X 8 FIELD PROGRAMMABLE LOGIC SEQUENCER MONOLITHIC SILICON《两极数字微电路的存储器 16×48×8域可编程逻辑音序器和单片硅的产品规格》.pdf

《DLA SMD-5962-86709 REV F-2008 MICROCIRCUIT DIGITAL BIPOLAR MEMORY 16 X 48 X 8 FIELD PROGRAMMABLE LOGIC SEQUENCER MONOLITHIC SILICON《两极数字微电路的存储器 16×48×8域可编程逻辑音序器和单片硅的产品规格》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-86709 REV F-2008 MICROCIRCUIT DIGITAL BIPOLAR MEMORY 16 X 48 X 8 FIELD PROGRAMMABLE LOGIC SEQUENCER MONOLITHIC SILICON《两极数字微电路的存储器 16×48×8域可编程逻辑音序器和单片硅的产品规格》.pdf（16页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change screening and group A inspections. Update table I. Update vendors part number. 87-06-22 M. A. Frye B Make changes to table I, 1.2.2, 1.3, 4.2a, and 4.3.2b. Editorial changes throughout. Make change to table II. 88-06-23 M. A. Frye C Add ve

2、ndor CAGE number 01295 to the drawing as a supplier for device 02. Add burn-in test condition A to 4.2 and 4.3.2. Changes to table I and figure 4, pages 11 and 12. Editorial changes throughout. 89-12-13 M. A. Frye D Change to vendor similar Part or Identifying Number (PIN) for vendor CAGE 01295. Edi

3、torial changes throughout. 92-03-04 M. A. Frye E Update drawing to current requirements. Editorial changes throughout. - gap 02-01-04 Raymond Monnin F Boilerplate update, part of 5 year review. ksr 08-04-25 Robert M. Heber CURRENT CAGE CODE 67268 REV SHET REV F SHET 15 REV STATUS REV F F F F F F F F

4、 F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY James E. Jamison DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Ray Monnin COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Mic

5、hael A. Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 86-08-08 MICROCIRCUIT, DIGITAL, BIPOLAR, MEMORY, 16 X 48 X 8 FIELD PROGRAMMABLE LOGIC SEQUENCER, MONOLITHIC SILICON AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 14933 5962-86709 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E343-0

6、8 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86709 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes devic

7、e requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86709 01 X A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Le

8、ad finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 82S105 16 x 48 x 8, field programmable, logic sequencer, (FPLS) 02 82S105 16 x 48 x 8, field programmable, logic sequencer, (FPLS) 1.2.2 Case outline(

9、s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP1-T28 or CDIP2-T28 28 Dual-in-line Y GDFP2-F28 28 Flat pack 3 CQCC1-N28 28 Leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF

10、-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage . 7.0 V dc maximum Input voltage . 10.0 V dc maximum during programming and 5.5 V dc maximum during operation. Storage temperature range -65C to +150C Maximum power dissipation 1/ . 1.018 W Lead temperature (soldering, 10 seconds) . +3

11、00C Thermal resistance, junction-to-case (JC): Cases X, Y, and 3 See MIL-STD-1835 Junction temperature (TJ) +150C Output sink current 2/ . 100 mA 1.4 Recommended operating conditions. Supply voltage range (VCC) 4.5 V dc to 5.5 V dc Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level

12、input voltage (VIL) 0.8 V dc Case operating temperature range (TC) . -55C to +125C _ 1/ Must withstand the added PDdue to short-circuit test; e.g., IOS. 2/ Not applicable for device type 02. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MI

13、CROCIRCUIT DRAWING SIZE A 5962-86709 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawi

14、ng to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883

15、 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/

16、assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text

17、 of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN cl

18、ass level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance

19、with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device

20、. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall

21、be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. 3.2.3.1 Unprogrammed devices. The truth table for unpro

22、grammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in groups A, B, or C (see 4.3.1c), the devices shall be programmed by the manufacturer prior to test in a checkerboard pattern (a minimum of 50 percent of the total number of gates progra

23、mmed) or to any altered item drawing pattern which includes at least 25 percent of the total number of gates programmed. 3.2.3.2 Programmed devices. The truth table for programmed devices shall be as specified by an attached altered item drawing. 3.2.4 Logic diagram. The logic diagram shall be as sp

24、ecified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permit

25、ted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86709 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. Th

26、e electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD P

27、IN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indica

28、tor “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MI

29、L-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate

30、of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. Defense Supply Ce

31、nter Columbus (DSCC), DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Processing options. Since the device is capable of be

32、ing programmed by either the manufacturer or the user to result in a wide variety of configurations; two processing options are provided for selection in the contract, using an altered item drawing. 3.10.1 Unprogrammed device delivered to the user. All testing shall be verified through group A testi

33、ng as defined in 3.2.3.1 and table II. It is recommended that users perform subgroups 7 and 9 after programming to verify the specific program configuration. 3.10.2 Manufacturer-programmed device delivered to the user. All testing requirements and quality assurance provisions herein, including the r

34、equirements of the altered item drawing, shall be satisfied by the manufacturer prior to delivery. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86709 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399

35、0 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C VCC= 5.0 V 10% Group A subgroups Device type Limits Unit unless otherwise specified Min Max Low level input VILVCC= 4.5 V 1, 2, 3 All 0.8 V voltage High level inp

36、ut VIHVCC= 5.5 V 1, 2, 3 All 2 V voltage Input clamp voltage 2/ VICVCC= 4.5 V, II= -18 mA 1, 2, 3 All -1.2 V Low level input IILVCC= 5.5 V, VI= 0.45 V 1, 2, 3 01 -150 A current I= 0.4 V 02 -250 High level input IIHVCC= 5.5 V, VI= 5.5 V 1, 2, 3 All 50 A current Clock input current IIVCC= 5.5 V, VI= 0

37、.45 V 1, 2, 3 01 -350 A Low level output VOLVCC= 4.5 V, VIL= 0.8 V 1, 2, 3 All 0.5 V voltage 3/ VIH= 2 V, IOL= 9.6 mA High level output VOHVCC= 4.5 V, VIL= 0.8 V 1, 2, 3 All 2.4 V voltage 4/ VIH= 2 V, IOH= -2 mA Output short-circuit IOSVCC= 5 V, VO= 0 V 1, 2, 3 01 -15 -85 mA current 2/ 5/ CC= 5.5 V,

38、 VO= 2.25 V 02 -30 -112 DC supply current 6/ ICCVCC= 5.5 V 1, 2, 3 All 185 mA Three-state output IOZVCC= 5.5 V, VOUT= 5.5 V 1, 2, 3 01 60 A current 7/ VCC= 5.5 V, VOUT= 2.7 V 02 20 CC= 5.5 V, VOUT= 0.45 V 01 -60 CC= 5.5 V, VOUT= 0.4 V 02 -20 Functional tests See 4.3.1d 7, 8 Propagation delay time, t

39、CKOVCC= 5.0 V 9, 10, 11 01 35 ns CLK to output R1 = 470, R2 = 1 k 02 20 Propagation delay time, tOECL= 30 pF 9, 10, 11 01 40 OE - to output- 8/ See figure 4 9 02 25 Propagation delay time, tOD9 01 40 OE + to output+ 8/ 02 15 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction

40、 or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86709 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C VCC=

41、5.0 V 10% Group A subgroups Device type Limits Unit unless otherwise specified Min Max Propagation delay time, tPPRVCC= 5.0 V 9, 10, 11 All 20 ns power-on preset R1= 470, R2= 1 k Propagation delay tPRCL= 30 pF, 01 45 time, preset See figure 4 02 25 Pulse width, CLK high tCKH01 40 and CLK low 9/ tCKL

42、02 12 Pulse width, CLK period tCKP01 95 02 24 Pulse width, CLK period tCKPAll 135 (through complement array) 9/ Pulse width, preset tPRHAll 40 Setup time, input to CLK tIS01 60 02 18 Setup time, input to CLK tIS01 100 (through complement 02 40 array) 8/ Setup time, tVSAll 5 power-on preset Setup tim

43、e, preset 8/ tPRSAll 5 Hold time, CLK to input tIHAll 10 1/ All voltage values are with respect to ground. 2/ Test one pin at a time. 3/ Measured with a programmed logic condition for which the output is at a low logic level and VILapplied to PR/ OE . Output sink current is supplied through a resist

44、or to VCC. 4/ Measured with VILapplied to OE and a logic high stored or with VIHapplied to PR. 5/ Duration of short-circuit should not exceed 1 second. 6/ ICCis measured with the PR/ OE input grounded and the outputs open. 7/ Measured with VIHapplied to PR/ OE . 8/ Not testable on unprogrammed devic

45、es. 9/ To prevent spurious clocking, clock rise time (10% to 90%) 30 ns. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86709 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7

46、 DSCC FORM 2234 APR 97 FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86709 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 AP

47、R 97 Option VCCPR OE I0CLK S R QP/FF H * X X X H H L +10 V X X X Qn(Qp)nL X X X X Qn(QF)nH * X X X QnHi-Z +5 V L +10 V X X X Qn(QP)nL X X X X Qn(QF)nL X L L Qn(QF)nL X L H L L L X H L H H L X H H IND IND X X X X X H NOTES: 1. Positive logic S/R = T0+ T1+ T2+ . . . + T47Tn= (I0, I1, I2) (P0, P1. . .

48、P5) 2. Either preset (active-high) or enable output (active low) are available, but not both. The desired function is a user programmable option. 3. denotes transition from low to high level. 4. R = S = High is an illegal input condition 5. * = H/L/+ 10 V 6. X = Dont care (s) 5.5 V. FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-