DLA SMD-5962-86023 REV D-2011 MICROCIRCUIT MEMORY DIGITAL BIPOLAR 256-BIT RAM MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change supply voltage. Change junction temperature. Change to military drawing format. 87-04-14 N. A. Hauck B Changes in accordance with NOR 5962-R156-96 96-06-26 M. A. Frye C Boilerplate update, part of 5 year review. REDRAWN ksr 05-09-12 Raymon

2、d Monnin D Updated body of drawing to reflect current requirements. - glg 11-01-28 Charles Saffle CURRENT CAGE CODE 67268 THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED REV SHEET REV SHEET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED

3、 BY Sandra Rooney DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Dan DiCenzio COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Don Cool MICROCIRCUIT, MEMORY, DIGITAL, BIPOLAR 256-BIT RAM, MONOLITHIC SILICON AND AGENCIES

4、 OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 03 March 1986 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 14933 86023 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E187-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SI

5、ZE A 86023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifyin

6、g Number (PIN). The complete PIN is as shown in the following example: 86023 01 E A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 0

7、1 82S16 256-bit X 1 bipolar RAM 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line package F GDFP2-F16 or CDFP3-F16 16 Flat package 1.2.3 Lead finish. The

8、lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage +7 V dc maximum Output voltage . +5.5 V dc maximum Storage temperature range . -65C to +150C Maximum power dissipation (PD) 1/ 660 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resist

9、ance, junction-to-case (JC): Cases E and F See MIL-STD-1835 Junction temperature (TJ) . +200C 1.4 Recommended operating conditions. Supply voltage +4.75 V dc to +5.25 V dc Case operating temperature range (TC) -55C to +125C Maximum high level input voltage . +2.0 V dc Maximum low level input voltage

10、 +0.8 V dc 1/ Must withstand the added PDdue to short circuit test (e.g., IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC F

11、ORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitat

12、ion or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DE

13、FENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelp

14、hia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obt

15、ained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and quali

16、fied manufacturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Qualit

17、y Management (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to ide

18、ntify when the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Tr

19、uth table. The truth table shall be as specified on figure 2. 3.2.3 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.4 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the

20、electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in

21、table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devic

22、es built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. Provided by IHSNot for ResaleNo reproduction or networking permitted without licen

23、se from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ Group A Limits Unit -55C TC +125C subgroups 4.75 V VCC 5.25 V See figur

24、e 4 Min Max High-level input VIHVCC= maximum 1, 2, 3 2.0 V voltage Low-level input VILVCC= minimum 1, 2, 3 0.8 V voltage Clamp voltage VICVCC= minimum, IIN= -18 mA 1, 2, 3 -1.5 V High-level output VOHVCC= minimum, IOH= -3.2 mA 1, 2, 3 2.4 V voltage 2/ Low-level output VOLVCC= minimum, IOL= 16 mA 1,

25、2, 3 0.5 V voltage 3/ High-level input IIHVCC= maximum, VIN= 5.5 V 1, 2, 3 25 A current 4/ Low-level input IILVCC= maximum, VIN= 0.45 V 1, 2, 3 -250 A current 4/ Hi-Z state output IOZVCC= maximum VOUT= 5.5 V 1, 2, 3 50 current 5/ A VOUT= 0.45 V -50 Short circuit IOSVCC= maximum, VO= 0 V 1, 2, 3 -15

26、-70 mA current 6/ VCCsupply ICCVCC= maximum, CE1, or CE2, or 1, 2, 3 120 mA current 7/ CE3= high Address access tAA4.75 V VCC 5.25 V 9, 10, 11 70 ns time See figure 5 Chip enable tCE4.75 V VCC 5.25 V 9, 10, 11 40 ns access time See footnotes at end of table. Provided by IHSNot for ResaleNo reproduct

27、ion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ Group A Limits Uni

28、t -55C TC +125C subgroups 4.75 V VCC 5.25 V See figure 4 Min Max Disable time tCD4.75 V VCC 5.25 V 9, 10, 11 40 ns Valid time tWD4.75 V VCC 5.25 V 9, 10, 11 55 ns Address setup tWSA4.75 V VCC 5.25 V 9, 10, 11 20 ns time Address hold tWHA4.75 V VCC 5.25 V 9, 10, 11 10 ns time Data in setup tWSD4.75 V

29、 VCC 5.25 V 9, 10, 11 50 ns time Data in hold tWHD4.75 V VCC 5.25 V 9, 10, 11 10 ns time CE setup time tWSC4.75 V VCC 5.25 V 9, 10, 11 10 ns CE hold time tWHC4.75 V VCC 5.25 V 9, 10, 11 10 ns Write enable tWP4.75 V VCC 5.25 V 9, 10, 11 40 ns pulse width 8/ 1/ All voltage values with respect to groun

30、d. 2/ Measured with a logic high stored. Output sink current is supplied through a resistor to VCC. 3/ Measured with a logic low stored and VILapplied to CE1, CE2, and CE3. 4/ Test each input one at a time. 5/ Measured with VIHapplied to CE1, CE2, and CE3. 6/ Duration of the short circuit should not

31、 exceed 1 second. 7/ ICCis measured with the write enable and memory enable inputs grounded, all other inputs at 4.5 V and the output open. 8/ Minimum required to guarantee a write into the slowest bit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,

32、-STANDARD MICROCIRCUIT DRAWING SIZE A 86023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDB

33、K-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A

34、certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime-VA shall be required for any change that affects this drawing. 3.9 Verification

35、and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling

36、 and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria

37、 shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify

38、the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior

39、to burn-in are optional at the discretion of the manufacturer. 4.3 Quality conformance inspection. Quality conformance inspection shall be in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspectio

40、n. a. Tests shall be as specified in table II herein. b. Subgroups 4, 5, and 6 in table I, method 5005 of MIL-STD-883 shall be omitted. c. Subgroups 7, 8A, and 8B shall include verification of the truth table. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified

41、 in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The

42、 test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. Provided by IHSNot for Resa

43、leNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 Device Types All Case Outlines E and F Terminal Number Terminal Symbol 1 2 3 4 5 6 7 8 9 10

44、 11 12 13 14 15 16 A1A0CE1CE2CE3 DOUT A4GND A5A6A7WE DINA3 A2VCCFIGURE 1. Terminal connections. Mode CE * WE DINDOUTRead 0 1 X Stored data Write “0“ 0 0 0 1 Write “1“ 0 0 1 0 Disabled 1 X X Hi-Z * “0“ = All CE inputs low. “1“ = One or more CE inputs high. “X“ = Dont care. FIGURE 2. Truth table. Prov

45、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 86023 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or network