DLA SMD-5962-86021 REV D-1992 MICROCIRCUIT DIGITAL HCMOS FLOATING POINT COPROCESSOR MONOLITHIC SILICON《硅单块 浮点协同处理机 互补金属氧化物半导体数字微型电路》.pdf

《DLA SMD-5962-86021 REV D-1992 MICROCIRCUIT DIGITAL HCMOS FLOATING POINT COPROCESSOR MONOLITHIC SILICON《硅单块 浮点协同处理机 互补金属氧化物半导体数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-86021 REV D-1992 MICROCIRCUIT DIGITAL HCMOS FLOATING POINT COPROCESSOR MONOLITHIC SILICON《硅单块 浮点协同处理机 互补金属氧化物半导体数字微型电路》.pdf（26页珍藏版）》请在麦多课文档分享上搜索。

1、SID-5962-Bb021 REV D W 9999996 0029151 TTT REV STATUS OF SHEETS REVISIONS REV DDDDDDDDD 123456789 SHEET LTR A PMIC NIA P STANDARDIZED MILITARY DESCRIPTION PREPARED BY Jeffery Tunstall DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 CHECKED BY Tim Noh Add device type 03. new design. Upgrade to f

2、ull military temperature range. Change drawing CAGE number. Editorial changes throughout. Inactivate device O1 for Add case outline Y. t houg hou t. Editorial changes Technical changes to table I. Changes to figure 1. Added vendor CAGE 48257 for device types 02 and 03. Correct package Y dimensions o

3、n figure 1. Editorial changes throughout. DATE (YR-MO-DA) 1988 APR 15 1989 SEPT 19 1990 AUG 9 THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. 1992 OCT 5 APPROVED W. Heckman W. Heckman W. Heckman DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF

4、 DEFENSE AMSC NIA MICROCIRCUIT, DIGITAL, HCMOS, MONOLITHIC SILICON DRAWING APPROVAL DATE 24 FEBRUARY 1987 SIZE CAGE CODE 67268 A REVISION LEVEL D I SHEET 1 I 5962-86021 OF 25 JUL 91 DISTRIBUTION STATEMENT A. Approved for public release: distribution is unlimited. 5962-E490 Licensed by Information Ha

5、ndling ServicesSMD-5962-8602L REV D 9999996 0029152 93b ST-IZRn MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTEB. MYTON, OHIO 45444 1. SCOPE 1.1 Scope. This drawing describes device requirements for class E microcircuits in accordance with 1.2.1 of 1.2 Part nunter. The conplete part nuher shall be

6、 as shown in the following exanple: MIL-STD-883, “Provisions for the use of MIL-STO-883 in conjunction with conpliant non-JAN devices“. L T I T 5962-86021 1 III Drawing nunber Device type Case outline Lead finish per (1.2.1) (1.2.2) MI L-M-38510 1.2.1 Device t.mes. The device types shall identify th

7、e circuit function as follows: Device type Generic nunber Circuit function SIZE 5962-86021 A REVISION LEVEL SHEET D 2 o1 02 03 68881-12 HCMOS floating point coprocessor 68881-16 HCMOS floating point coprocessor 68881-20 HCFK)S floating point coprocessor 1.2.2 Case outlines. The case outlines shall b

8、e as designated in appendix C of MIL-M-38510, and as follows: Outline letter Case outline X Y P-AB (6-pin, 1.080“ x 1.080“ x .345“), pin grid array package See figure 1 (68-lead, .960“ x .960“ x .135“), leaded chip carrier package 1.3 Absolute maximum ratinus. Supply voltage range with respect to GN

9、D (Vcc) - - - -0.3 V dc to t7.0 V dc Storage tenperature range- - - - - - - - - - - - - - -55C to +150C 1.0 n Lead temperature (soldering, 5 seconds)- - - - - - - +27OoC Junction temperature (Tj)- - - - - - - - - - - - - - +150C Thermal resistance, junction-to-case (OJc) : Maximum power dissipation

10、(PD) - - - - - - - - - - - seX- See MIL-M-38510. appendix C QseY- lOC/W 1.4 Recomnended operatina conditions. Supply voltage range (Vcc) - - - - - - - - - - - - - 4.5 V dc nininini to 5.5 V dc mxinm Hlgh level input voltage range (VI,): All inputs - - - - - - - - - - - - - - - - - - - 2.0 V dc to 5.

11、25 V dc Low level input voltage range (VIL): Minim high level output voltage- - - - - - - - - - 2.4 V dc Maxim low level output voltage - - - - - - - - - - 0.5 V dc Case operating tenperature range (TC)- - - - - - - - -55C to +125“C A11 inputs - - - - - - - - - - - - - - - - - GND -0.3 V dc to 0.8 V

12、 dC . Licensed by Information Handling ServicesSflD-59b2-b021 REV D m 9999996 0029353 72 m 2. APPLICABLE DOCUMENTS 2.1 Government specification. standard, and bulletin. Unless otherwise specified, the following specification, standard, and bulletin of the issue listed in that issue of the Department

13、 of Defense Index of Specifications and Standards specified in the solicitation, form a part of this drawing to the extent specified herein. SPECIFICATION MILITARY MIL-M-38510 - Microcircuits, General Specification for. STANDARD MIL I TARY MIL-STO-883 - Test Methods and Procedures for Microelectroni

14、cs. BULLETIN MI L I TARY MIL-BUL-103 - List of Standarized Military Drawings (SMDs). (Copies of the specification, standard, and bulletin required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity or as directed by the contracting act

15、ivity.) herein, the text of this drawing shall take precedence. 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with 1.2.1 of MIL-STO-883, “Pro

16、visions for the use of MIL-STO-883 in conjunction with compliant non-JAN devices“ and as specified herein. 3.2 esiqn, construction, and Dhysical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-M-38510 and herein. 3.2.1 Case outlines. The case outlines shall

17、 be in accordance with 1.2.2 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Functional block diaqram. The functional block diagram shall be as specified on figure 3. 3.3 Electrical performance characteristics. Unless otherwise speci

18、fied herein, the electrical performance 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. 3.5 Markinq. Marking shall be in accordance with MIL-STO-883 (see 3.1 herein). The part shall be marked with the characteristics are as specified i

19、n table I and shall apply over the full case operating temperature range. The electrical tests for each subgroup are described in table I. part number listed in 1.2 herein. MIL-BUL-103 (see 6.7 herein). In addition, the manufacturers part number may also be marked as listed in STANDARDIZED SIZE 5962

20、-86021 MILITARY DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET D 3 DESC FORM 193A JUL 91 Licensed by Information Handling ServicesSMD-59b2-8b023 REV D 9999996 0029354 709 1,2,3 I All I I Test I I Input high voltage IVIH 2.0 Vcc 1 V I I Input low voltage IVIL I I

21、l nm 1-e current liIN CLK, RExT,RJW, I I SIZE I I - AO-A4, CS. DS, AS, I Hi-Z (off-state) inputiITSI current DSACKO, I DSACK1, DO431 I I I *cc Supply current STANDBRDIZED NILITARY DRAUNG DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 Outputlow current 1 oL SENSE SIZE 5962-86021 A REVISION LEVE

22、L SHEET D 4 I Output high voltage IVoH DSACKO, DSACKl, I TABLE I. Electrical performance characteristics. f I I i I Limits I Wave- I form i Conditions Group A Device i i Unit ence lunless otherwise specified laroups I I Min I Max I refer- I -55OC 5 TC 5 +125OC I sub- (type I l I IVcc - 5.5 v I I l I

23、 I I I I I I l I I 1.2.3 I All I 110 I ClA I I I I I I I I I I I 120 I riA /VIN = 2.4 V or 0.4 V I 1,2.3 I All I 1 1.2.3 i All I I Output low voltage IVoL i DSACKO . DSACK1. I IFIN O V. TC a +25C i 4 i I = 1 MHz), see 4.3.1 Capacitance ICiN 1 I I I I l I I Frequency of operation fEW( i IVIH = 2.4 V,

24、 VIL = 0.5 V 1!4tlO,11 i O1 II See figure 4 I I o2 I I L 2 I Clock period Itcyc I 1 I I I I I I I Clock width low I J I 03 I I 19.10.11 I o1 I I I l9,10,11 I o1 I 02 03 I 02 I I I I I I (0.5 I V I I I I 20 i PF II - I I 8.0 112.5 I MHz 8.0 116.67 1 12.5 120 I 80 (125 I ns 60 1125 I 50 I 80 I I I I I

25、 20 54 See footnotes at end of table. Licensed by Information Handling ServicesSMD-59b2-8b023 REV D W 999999b 0029355 645 Wave- I I Limits I I I I l I I 5 I ns I STANDARD1 ZED MILITARY DUWING DEFENSE ELECTRONICS SUPPLY CWTER DAYTON, OHIO 45444 5962-86021 SIZE A REVISION LEVEL SHEET D 5 Licensed by I

26、nformation Handling ServicesSTARDARDIZED SIZE HILITARY DRAWING A DEFENSE ELECTBONICS SUPPLY CEN!WR DAYTON, OHIO 45444 REVISION LEVEL n 5962-86021 SHEET 6 TABLE I. Electrical performance characteristics - Continued. Test symbo 1 - RVASL t - I Wave- I form Conditions refer- I -55C 2 TC 5 +125OC ence u

27、nless otherwise specified I/ 14.5v2vcc5.5v 2J I I ISee figure 4 10 IV, 2.4 V, VIL 0.5 V I I I Group IOevice groups ltype A Sub- I I 9,10.11 I o1 I 02 I 9.10,ll I o1 I 02 I 9,10,11 I o1 I 02 I 9,10,11 I o1 I 02 I o3 I I 9,10,11 I o1 I 02 I o3 I I 9,10,11 I o1 I 02 I I 01 I 02 I I 03 I 03 I 03 I 03 i

28、03 I “0: 9.10*11 I :i I 03 I + 9,10,11 I A11 I I I 01 I 02 I I 03 I l R/ high (read) to asserted 20 i j ns 15 I I I I 10 20 15 I I ns 10 I I 45 I I ns 35 I I I I I ns I 15 I I 10 I 10 I 30 R/ high (read) to 0s asserted R/ low (write) to E asserted I lob I - AS negated toR/ low (read1 or AS negated t

29、o R/H high (write) L I I I lia I I - DS negated toa1 low (read) OS- negated to R/W high (write) (write) - DS width asserted the main processor expects 16-bit registers that are located in a 32-bit port at odd word addresses (Al - 1) to be implemented uta lines DO-015. For accesses to these registers

30、 when configured for 32-bit bus operation, the device generates DSACK signals as listed in table I to inform the main rocessor of valid data on D16-D31 instead of DO-D15. An external holding register is required to maintain both b and DSACK1 high betweenbus cyclesae DSACKO and DSACK1 lines are activ

31、ely pulled up (negated) by the device following the rising edge of AS and both DSACK lines are then three-stated (high-impedance state) to avoid interference with the next bus cycle. - STA“)IZED SIZE 5962-86021 MILITARY DIUUING A DEFENSE ELECTRONICS SUPPLY CENT= DAYTON, OHIO 45444 REVISION LEVEL SHE

32、ET D 24 IESC FORM 193A JUL 91 Licensed by Information Handling ServicesSMD-59b2-8b02L REV D 9999996 0029375 433 STANDARDIZED HILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 7 leset (RESETl. This active-low input signal causes the device to initialize the floating-point data reg

33、isters to lonsignaing not-a-nunibers (NANs) and clears the floating-point control, Status, and inst ruction address registers. Ihen performing a power-up reset, the external circuitry should keep the RESET line asserted for a minimum of four clock cycles after V :or conpatibility wiik all family dev

34、ices, 100 milliseconds should be used at the minimum. Whenrforming a reset ifter the device V has been within tolerance for mre than the initial power-up time, the RESET line must have an isserted pulse widtk which is greater than two clock cycles. For conpatibility with all similar family devices,

35、10-clock cycles should be used as the minimum. is within tolerance. This assures correct initialization of the device when power is applied. The device clock input is a TTL-conpatible signal that is internally buffered for development of the signals. The clock input must be a constant frequency squa

36、re wave. 7 Sense device (SENSE). This pin my optionally be used as an additional GND pin, or as an indicator to external hardware that the device is present in the system. This signal is internally connected to the GNO of the die, but it is not necessary to connect it to the external ground for corr

37、ect device operation. If a pull-up resistor is connected to this pin. external hardware may sense the presence of the device in a system. If the pin floats high, then the coprocessor is not installed; while the pin will be pulled low if the device is installed in the system. Power (Vpr and GNDl. The

38、se pins provide the supply voltage and system reference level for the internal circuitry of the device. Care should be taken to reduce the noise level on these pins with appropriate capacitive decoupling. SIZE 5962-86021 A REVISION LEVEL SHEET D 25 6.7 ApDroved sources of supply. Approved sources of

39、 supply are listed in MIL-BUL-103. The vendors listed in VIL-BUL-103 have agreed to this drawing and a certificate of conpliance (see 3.6 herein) has been submitted to and sccepted by DESC-ECC. Licensed by Information Handling ServicesSMD-5962-8b02L REV D 7779996 0027L7b 37T STANDARDIZED MILITARY DR

40、AWING SOURCE APPROVAL BULLETIN DATE: 1992 OCT 5 Approved sources of supply for SM 5962-86021 are listed below for imnediate acquisition only and shall be added to MIL-BUL-103 during the next revision. MIL-BUL-103 will be revised to include the addition or deletion of sources. The vendors listed belo

41、w have agreed to this drawing and a certificate of conpliance has been submitted to and accepted by DESC-ECC. This bulletin is superseded by the next dated revision of MIL-8UL-103. 1 I I I Military drawing part nunber Vendor number 1 CAGE i Vendor I nuhrj similar part I I 68881-12/BZAX I I la 1 5962

42、-8602101XX J I I n I I 1 5962-8602102XX 1 5962-8602102YX I 5962-8602102XX 5962-8602102YX 04713 18778 I 2 1 5962-8602103XX I 04713 5962-8602103XX 18778 TS68881MRB/C20 5962 -8602 103YX I 04713 I 6881-20/BYCJC I 5962-8602103YX 18778 I TS68881HFB/C20 I l/Caution. Do not use this nunber for item acquisit

43、ion. Items acquired to this nuniber may not satisfy the performance requirements of this drawing. 2JInactive for new design. Not available from an approved source of supply. Vendor CAGE nuntier 04713 18778 Vendor name and address Motorola, Incorporated 5005 E. Md)owell Road Phoenix, A2 85008 Point o

44、f contact: 2100 E. Elliot Rd. Tem. AZ 85283 Thomson Electron Tubes and Devices Corporation 40 G Corinerce Way Totowa. NJ 07511 I I The information contained herein is disseminated for convenience only and I the Governinent assumes no liability whatsoever for any inaccuracies in this I infomtion bulletin. I Licensed by Information Handling Services